完善资料让更多小伙伴认识你，还能领取20积分哦， 立即完善>
3天内不再提示
德赢Vwin官网
论坛
3444
|
本帖最后由 一只耳朵怪 于 2018-6-14 11:57 编辑
在调试F28M35时候，M3的程序能够正常下载到flash上，而C28不能下载，ccs 6提示的错误信息为： C28xx_0: Loader: One or more sections of your program falls into a memory region that is not writable. These regions will not actually be written to the target. Check your linker configuration and/or memory map. C28xx_0: File Loader: Verification failed: Values at address 0x000000000013E000 do not match Please verify target memory and memory map. C28xx_0: GEL: File: C:UsersMQinDongDocumentsTIccsProjectsMMCMMC_v2MMC_C28_v2FLASHMMC_C28_v2.out: a data verification error occurred, file load failed. 我用的cmd文件是controlSUITE提供的最新版本(v206)：F28M35x_headers/cmd/F28M35x_Headers_nonBIOS.cmd和F28M35x_commoncmdF28M35H52C1_c28.cmd. 其中，F28M35H52C1_c28.cmd如下。 MEMORY [ PAGE 0: /* Program Memory */ /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE1 for data allocation */ RAML0 : origin = 0x008000, length = 0x001000 /* on-chip RAM block L0 */ RAML1 : origin = 0x009000, length = 0x001000 /* on-chip RAM block L1 */ FLASHN : origin = 0x100000, length = 0x002000 /* on-chip FLASH */ FLASHM : origin = 0x102000, length = 0x002000 /* on-chip FLASH */ FLASHL : origin = 0x104000, length = 0x002000 /* on-chip FLASH */ FLASHK : origin = 0x106000, length = 0x002000 /* on-chip FLASH */ FLASHJ : origin = 0x108000, length = 0x008000 /* on-chip FLASH */ FLASHI : origin = 0x110000, length = 0x008000 /* on-chip FLASH */ FLASHH : origin = 0x118000, length = 0x008000 /* on-chip FLASH */ FLASHG : origin = 0x120000, length = 0x008000 /* on-chip FLASH */ FLASHF : origin = 0x128000, length = 0x008000 /* on-chip FLASH */ FLASHE : origin = 0x130000, length = 0x008000 /* on-chip FLASH */ FLASHD : origin = 0x138000, length = 0x002000 /* on-chip FLASH */ FLASHC : origin = 0x13A000, length = 0x002000 /* on-chip FLASH */ FLASHA : origin = 0x13E000, length = 0x001F80 /* on-chip FLASH */ CSM_RSVD : origin = 0x13FF80, length = 0x000070 /* Part of FLASHA. Program with all 0x0000 when CSM is in use. */ BEGIN : origin = 0x13FFF0, length = 0x000002 /* Part of FLASHA. Used for "boot to Flash" bootloader mode. */ FLASH_EXE_ONLY_P0 : origin = 0x13FFF2, length = 0x000002 /* Part of FLASHA. Flash execute only locations in FLASHA */ ECSL_PWL_P0 : origin = 0x13FFF4, length = 0x000004 /* Part of FLASHA. ECSL password locations in FLASHA */ CSM_PWL_P0 : origin = 0x13FFF8, length = 0x000008 /* Part of FLASHA. CSM password locations in FLASHA */ FPUTABLES : origin = 0x3FD258, length = 0x0006A0 /* FPU Tables in Boot ROM */ IQTABLES : origin = 0x3FD8F8, length = 0x000B50 /* IQ Math Tables in Boot ROM */ IQTABLES2 : origin = 0x3FE448, length = 0x00008C /* IQ Math Tables in Boot ROM */ IQTABLES3 : origin = 0x3FE4D4, length = 0x0000AA /* IQ Math Tables in Boot ROM */ BOOTROM : origin = 0x3FEDA8, length = 0x001200 /* Boot ROM */ PIEMISHNDLR : origin = 0x3FFFBE, length = 0x000002 /* part of boot ROM */ RESET : origin = 0x3FFFC0, length = 0x000002 /* part of boot ROM */ VECTORS : origin = 0x3FFFC2, length = 0x00003E /* part of boot ROM */ PAGE 1 : /* Data Memory */ /* Memory (RAM/FLASH/OTP) blocks can be moved to PAGE0 for program allocation */ /* Registers remain on PAGE1 */ BOOT_RSVD : origin = 0x000000, length = 0x000050 /* Part of M0, BOOT rom will use this for stack */ RAMM0 : origin = 0x000050, length = 0x0003B0 /* on-chip RAM block M0 */ RAMM1 : origin = 0x000400, length = 0x000400 /* on-chip RAM block M1 */ RAML2 : origin = 0x00A000, length = 0x001000 /* on-chip RAM block L2 */ RAML3 : origin = 0x00B000, length = 0x001000 /* on-chip RAM block L3 */ RAMS0 : origin = 0x00C000, length = 0x001000 /* on-chip Shared RAM block S0 */ RAMS1 : origin = 0x00D000, length = 0x001000 /* on-chip Shared RAM block S1 */ RAMS2 : origin = 0x00E000, length = 0x001000 /* on-chip Shared RAM block S2 */ RAMS3 : origin = 0x00F000, length = 0x001000 /* on-chip Shared RAM block S3 */ RAMS4 : origin = 0x010000, length = 0x001000 /* on-chip Shared RAM block S4 */ RAMS5 : origin = 0x011000, length = 0x001000 /* on-chip Shared RAM block S5 */ RAMS6 : origin = 0x012000, length = 0x001000 /* on-chip Shared RAM block S6 */ RAMS7 : origin = 0x013000, length = 0x001000 /* on-chip Shared RAM block S7 */ CTOMRAM : origin = 0x03F800, length = 0x000380 /* C28 to M3 Message RAM */ MTOCRAM : origin = 0x03FC00, length = 0x000380 /* M3 to C28 Message RAM */ FLASHB : origin = 0x13C000, length = 0x002000 /* on-chip FLASH */ ] /* Allocate sections to memory blocks. Note: codestart user defined section in DSP28_CodeStartBranch.asm used to redirect code execution when booting to flash ramfuncs user defined section to store functions that will be copied from Flash into RAM */ SECTIONS [ /* Allocate program areas: */ .cinit : > FLASHA PAGE = 0 .pinit : > FLASHA, PAGE = 0 .text : > FLASHA PAGE = 0 codestart : > BEGIN PAGE = 0 ramfuncs : LOAD = FLASHD, RUN = RAML0, LOAD_START(_RamfuncsLoadStart), LOAD_SIZE(_RamfuncsLoadSize), LOAD_END(_RamfuncsLoadEnd), RUN_START(_RamfuncsRunStart), RUN_SIZE(_RamfuncsRunSize), RUN_END(_RamfuncsRunEnd), PAGE = 0 flashexeonly : > FLASH_EXE_ONLY_P0 PAGE = 0 ecslpasswds : > ECSL_PWL_P0 PAGE = 0 csmpasswds : > CSM_PWL_P0 PAGE = 0 csm_rsvd : > CSM_RSVD PAGE = 0 /* The following section definitions are required when using the IPC API Drivers */ GROUP : > CTOMRAM, PAGE = 1 [ PUTBUFFER PUTWRITEIDX GETREADIDX ] GROUP : > MTOCRAM, PAGE = 1 [ GETBUFFER : TYPE = DSECT GETWRITEIDX : TYPE = DSECT PUTREADIDX : TYPE = DSECT ] /* Allocate uninitalized data sections: */ .stack : > RAMM0 PAGE = 1 .ebss : > RAML2 PAGE = 1 .esysmem : > RAML2 PAGE = 1 /* Initalized sections go in Flash */ /* For SDFlash to program these, they must be allocated to page 0 */ .econst : > FLASHA PAGE = 0 .switch : > FLASHA PAGE = 0 /* Allocate IQ math areas: */ IQmath : > FLASHA PAGE = 0 /* Math Code */ IQmathTables : > IQTABLES, PAGE = 0, TYPE = NOLOAD /* Allocate FPU math areas: */ FPUmathTables : > FPUTABLES, PAGE = 0, TYPE = NOLOAD DMARAML2 : > RAML2, PAGE = 1 DMARAML3 : > RAML3, PAGE = 1 /* Uncomment the section below if calling the IQNexp() or IQexp() functions from the IQMath.lib library in order to utilize the relevant IQ Math table in Boot ROM (This saves space and Boot ROM is 1 wait-state). If this section is not uncommented, IQmathTables2 will be loaded into other memory (SARAM, Flash, etc.) and will take up space, but 0 wait-state is possible. */ /* IQmathTables2 : > IQTABLES2, PAGE = 0, TYPE = NOLOAD [ IQmath.lib ] */ /* Uncomment the section below if calling the IQNasin() or IQasin() functions from the IQMath.lib library in order to utilize the relevant IQ Math table in Boot ROM (This saves space and Boot ROM is 1 wait-state). If this section is not uncommented, IQmathTables2 will be loaded into other memory (SARAM, Flash, etc.) and will take up space, but 0 wait-state is possible. */ /* IQmathTables3 : > IQTABLES3, PAGE = 0, TYPE = NOLOAD [ IQmath.lib ] */ /* .reset is a standard section used by the compiler. It contains the */ /* the address of the start of _c_int00 for C Code. /* /* When using the boot ROM this section and the CPU vector */ /* table is not needed. Thus the default type is set here to */ /* DSECT */ .reset : > RESET, PAGE = 0, TYPE = DSECT vectors : > VECTORS PAGE = 0, TYPE = DSECT ] 
0
|
|
相关推荐
10个回答
|
|
|
我之后又将上述F28M35H52C1_c28.cmd替换为28M35H52C1_RAM_lnk_c28，就可以下载到RAM调试了，有谁遇到相同问题？我估计是cmd文件的问题，但不知道哪儿出错。
|
|
|
|
|
60user38 发表于 2018-6-14 09:08 Dong, 检查下是否超出了FLASHA段的大小。 |
|
|
|
|
|
没有超出FLASHA的大小，因为map文件显示 FLASHA unused memory还有空间。我也尝试将代码放到更大的FLASH段，仍然出现相同问题。 |
|
|
|
|
|
|
|
|
2018-6-14 09:34:24
评论
|
|
|
我也试过了，仍然出现相同的问题。 我测试的最小例程是controlSUITE里面的..ticontrolSUITEdevice_supportf28m35xv206F28M35x_examples_Dualblinky目录下的例程。我也测试了controlSUITE以前版本的同名例程，v203~v206都测试了，都是相同问题。 有人说是仿真器或者芯片的原因，不知道是不是有这样的可能。如果是仿真器的原因，但是M3的代码是可以用我用的仿真器烧写到 m3 flash运行的，并且C28 core也可以在RAM里面运行，且在CCS 调试界面相关的调试操作也很正常，比如断点、停止、运行等操作，所以我觉得我的仿真器是正常的。同理，我觉得芯片出问题的可能性也较小。我现在也没办法，暂时只能让代码在RAM运行。 |
|
|
|
|
60user38 发表于 2018-6-14 09:43 |
|
|
|
|
|
不知道TI ccs有没有flash擦除工具？我想尝试下看能不能擦除C28 的FLASH，或者能够实现相同功能的途径也行 |
|
|
|
|
|
Dong, 连接上目标板之后，在tools中有一个在线Flash烧写插件的，直接点击打开就可以进行擦除等操作。 |
|
|
|
|
|
Martin Yu, 我现在是点击DEBUG那个蜘蛛图标进入DEBUG 界面的，意味着此时我的代码已经烧写到C28的RAM里面了。然后我再点击tools/On-chip flash,然后点击图1所示的erase flash,CCS 提示错误，如图2所示。但是此时我的仿真器是连上的，因为如果此时我点击运行，我的板子是正常运行的（代码是烧写在RAM里面运行的）。我这种情况是否意味着我的芯片的FLASH 出了问题。 图1 图2 |
|
|
|
|
60user38 发表于 2018-6-14 10:28 经过测试，是我的芯片的C28 FLASH损坏了。 |
|
|
|
|
只有小组成员才能发言，加入小组>>
358 浏览 1 评论
551 浏览 2 评论
NA555DR VCC最低电压需要在5V供电，为什么用3.3V供电搭了个单稳态触发器也使用正常?
797 浏览 3 评论
MSP430F249TPMR出现高温存储后失效了的情况，怎么解决？
667 浏览 1 评论
对于多级放大电路板，在PCB布局中，电源摆放的位置应该注意什么？
1142 浏览 1 评论
AT32F407在USART2 DMA发送数据时，接包接到了要发送的数据，程序还是处于等待传输完成的标识判断中，为什么？
95浏览 29评论
378浏览 23评论
请问下tpa3220实际测试引脚功能和官方资料不符，哪位大佬可以帮忙解答下
268浏览 20评论
请教下关于TAS5825PEVM评估模块原理图中不太明白的地方，寻求答疑
217浏览 14评论
两个TMP117传感器一个可以正常读取温度值，一个读取的值一直是0，为什么？
74浏览 13评论
/7 
关注我们的微信
下载发烧友APP
德赢Vwin官网 观察
版权所有 © 湖南华秋数字科技有限公司
德赢Vwin官网 （电路图） 湘公网安备 43011202000918 号 电信与信息服务业务经营许可证：合字B2-20210191
工商网监
湘ICP备2023018690号
淘帖
1437
