完善资料让更多小伙伴认识你，还能领取20积分哦， 立即完善>
3天内不再提示
德赢Vwin官网
论坛|
亲爱的大家，
我正在为Virtex 7实现嵌入式项目。（VC707板） 我使用xps修改.mhs和.ucf文件。 我被这些警告和最后的错误所困扰。 在这里附上你找到所有报告。 此外，最终MAP摘要报告是： 版本14.7 Map P.20131013（nt64）Xilinx Map应用程序日志文件的设计'system_VC707_stub'设计信息------------------命令行：map -intstyle pa -w system_VC707_stub。 ngd目标设备：xc7vx485t目标包：ffg1761目标速度：-2Mapper版本：virtex7 - $修订版：1.55 $映射日期：星期四03月17日17:57:27 2014警告：LIT：701 - PAD符号“IBUFDSN_IN_pin”有一个未定义的IOSTANDARD.WARNING ：LIT：702 - PAD符号“IBUFDSN_IN_pin”不受约束（LOC）到特定位置。将设计映射到LUT ...警告：MapLib：41 - TNM组的所有成员“FFS（”system_VC707_i / interrupt_controller / interrupt_controller / INTC_CORE_I / in tr_sync *“）”已经优化了设计。警告：MapLib：41 - TNM组的所有成员“FFS（”system_VC707_i / interrupt_controller / interrupt_controller / INTC_CORE_I / in tr_p1 *“）”已经优化了 design.WARNING：MapLib：46 - 用户定义的组“GRP_INTC_intr_sync_interrupt_controller”已被丢弃，因为它的全部 包含的元素在设计之外进行了优化。警告：MapLib：46 - 用户定义的组“GRP_INTC_intr_p1_interrupt_controller”已被丢弃，因为其所有包含的元素都在设计之外进行了优化。警告：MapLib：48 - 时序规范“ TS_sync_interrupt_controller“已被丢弃，因为其TO组（GRP_INTC_intr_sync_interrupt_controller）已被优化掉。警告：MapLib：47 - 时序规范”TS_intr_sync_p1_interrupt_controller“已被丢弃，因为它的FROM组（GRP_INTC_intr_sync_interrupt_controller）和TO组（GRP_INTC_intr_p1_interrupt_controller）都被优化掉了。 定向打包... FATAL_ERROR：Pack：pk***arouter.c：146：1.20 - 无法在路由图中找到名为DIFFO_INUSED的站点。 有关此问题的技术支持，请访问http://www.xilinx.com/support.Design摘要--------------错误数：1警告数：8 能帮我找到与Ethernet_wrapper相关的警告解决方案吗？ 我无法打开文件，所以我无法准确理解警告的来源是什么。 能帮我找到PIN AH8和AH9相关警告的解决方案吗？ 我在ucf文件中尝试了很多不同的约束，但没有什么能给我一个很好的解决方案。 最后一个错误与之前的警告有关吗？ 对于这个错误，我发现在这个论坛中有一些关于错误的解释但是我无法解决这个问题。 提前致谢 最好的祝福 朱塞佩戈塔多 system_VC707_stub.srp 244 KB system_VC707_stub.bld 41 KB system_VC707_stub.mrp 3 KB 以上来自于谷歌翻译 以下为原文 Dear all, I am working on implementation of an embedded project for a Virtex 7. (VC707 board) I worked in xps modifing .mhs and .ucf files. I am stucked on these warnings and this final error. Here attached you find all report. Moreover final MAP summary report is: Release 14.7 Map P.20131013 (nt64) Xilinx Map Application Log File for Design 'system_VC707_stub' Design Information ------------------ Command Line : map -intstyle pa -w system_VC707_stub.ngd Target Device : xc7vx485t Target Package : ffg1761 Target Speed : -2 Mapper Version : virtex7 -- $Revision: 1.55 $ Mapped Date : Thu Apr 03 17:57:27 2014 WARNING:LIT:701 - PAD symbol "IBUFDSN_IN_pin" has an undefined IOSTANDARD. WARNING:LIT:702 - PAD symbol "IBUFDSN_IN_pin" is not constrained (LOC) to a specific location. Mapping design into LUTs... WARNING:MapLib:41 - All members of TNM group "FFS("system_VC707_i/interrupt_controller/interrupt_controller/INTC_CORE_I/in tr_sync*")" have been optimized out of the design. WARNING:MapLib:41 - All members of TNM group "FFS("system_VC707_i/interrupt_controller/interrupt_controller/INTC_CORE_I/in tr_p1*")" have been optimized out of the design. WARNING:MapLib:46 - The user-defined group "GRP_INTC_intr_sync_interrupt_controller" has been discarded, because all of its included elements were optimized out of the design. WARNING:MapLib:46 - The user-defined group "GRP_INTC_intr_p1_interrupt_controller" has been discarded, because all of its included elements were optimized out of the design. WARNING:MapLib:48 - The timing specification "TS_sync_interrupt_controller" has been discarded because its TO group (GRP_INTC_intr_sync_interrupt_controller) was optimized away. WARNING:MapLib:47 - The timing specification "TS_intr_sync_p1_interrupt_controller" has been discarded because both its FROM group (GRP_INTC_intr_sync_interrupt_controller) and TO group (GRP_INTC_intr_p1_interrupt_controller) were optimized away. Running directed packing... FATAL_ERROR:Pack:pk***arouter.c:146:1.20 - Failed to find a site named DIFFO_INUSED in the routing graph. For technical support on this issue, please visit http://www.xilinx.com/support. Design Summary -------------- Number of errors : 1 Number of warnings : 8 Could you please help me to find the solution for the warning related with Ethernet_wrapper? I cannot open the file so I can't understand exactly what is the source of the warning. Could you please help me to find the solution for the warning related with PIN AH8 and AH9? I tried a lot of different constraints in the ucf files but nothing is giving me a good solution to the problem. Is the last error related to the previous warnings I got? For this error I found there are some explanations about bugs in this forum but I could not fix the problem nevertheless. Thanks in advance Best regards Giuseppe Gottardo 
0
|
|
相关推荐
2个回答
|
|
|
我认为问题与未定义的IO标准直接相关。
有几种情况可以看到相同的错误消息，其中类似的未定义IO标准默认默认为LVDS_25，这与双向配置不兼容。 以上来自于谷歌翻译 以下为原文 I think the problem is directly related to undefined IO Standards. There are several cases that have been seen with the same error message where similarly undefined IO Standards defaulted defaulted to LVDS_25 which is incompatible with bidirectional configurations. |
|
|
|
|
|
感谢您的回答。
我已经阅读了这篇文章（链接），但问题没有改变。 在我使用.ucf文件的这一部分之前： NET IBUFDSP_IN_pin LOC =“AH8”; NET IBUFDSN_IN_pin LOC =“AH7”; 因为在主约束文件中没有指定iostandard。 我在.ucf文件中也使用了这个IOSTANDARD约束： NET IBUFDSP_IN_pin LOC =“AH8”| IOSTANDARD =“LVCMOS18”; NET IBUFDSN_IN_pin LOC =“AH7”| IOSTANDARD =“LVCMOS18”; 但错误仍然存在（附件也是）： 版本14.7 Map P.20131013（nt64）Xilinx Map应用程序日志文件的设计'system_VC707_stub'设计信息------------------命令行：map -intstyle pa -w system_VC707_stub。 ngd目标设备：xc7vx485t目标包：ffg1761目标速度：-2Mapper版本：virtex7 - $修订版：1.55 $映射日期：星期五4月4日14:32:36 2014警告：LIT：702 - PAD符号“IBUFDSN_IN_pin”不受约束（LOC） 到达特定位置。警告：LIT：701 - PAD符号“ETHERNET_TXP_pin”具有未定义的IOSTANDARD.Mapping设计到LUT ...警告：MapLib：41 - TNM组的所有成员“FFS（”system_VC707_i / interrupt_controller / interrupt_controller / INTC_CORE_I / in tr_sync *“）”已经优化了设计。警告：MapLib：41 - TNM组的所有成员“FFS（”system_VC707_i / interrupt_controller / interrupt_controller / INTC_CORE_I / in tr_p1 *“）”已经优化了 design.WARNING：MapLib：46 - 用户定义的组“GRP_INTC_intr_sync_interrupt_controller”已被丢弃，因为我所有的 ts包含的元素在设计之外进行了优化。警告：MapLib：46 - 用户定义的组“GRP_INTC_intr_p1_interrupt_controller”已被丢弃，因为其所有包含的元素都在设计之外进行了优化。警告：MapLib：48 - 时序规范 “TS_sync_interrupt_controller”已被丢弃，因为其TO组（GRP_INTC_intr_sync_interrupt_controller）被优化掉了。警告：MapLib：47 - 时序规范“TS_intr_sync_p1_interrupt_controller”已被丢弃，因为它的FROM组（GRP_INTC_intr_sync_interrupt_controller）和TO组（GRP_INTC_intr_p1_interrupt_controller）都被优化掉了。 运行定向打包... FATAL_ERROR：Pack：pk***arouter.c：146：1.20 - 无法在路由图中找到名为DIFFO_INUSED的站点。 有关此问题的技术支持，请访问http://www.xilinx.com/support.Design摘要--------------错误数：1警告数：8 与这些引脚一起使用的最佳IOSTANDARD类型是什么？ 在手册中没有指定。 我怀疑在XPS中修改的.ucf文件在PlanAhead环境中没有更新，在设计中没有考虑到。 关于ethernet_wrapper连接到这个问题的第一个警告是什么？ 谢谢 朱塞佩戈塔多 system_VC707_stub.srp 244 KB system_VC707_stub.bld 41 KB system_VC707_stub.mrp 3 KB 以上来自于谷歌翻译 以下为原文 Thanks for your answer. I read this post (link) already but the problem doesn't change. before I was using this part of .ucf file: NET IBUFDSP_IN_pin LOC = "AH8"; NET IBUFDSN_IN_pin LOC = "AH7"; because in the master constraint file no iostandard is specified. After I used also this IOSTANDARD constraints in .ucf file: NET IBUFDSP_IN_pin LOC = "AH8" | IOSTANDARD = "LVCMOS18"; NET IBUFDSN_IN_pin LOC = "AH7" | IOSTANDARD = "LVCMOS18"; but the error still remains (attached files also): Release 14.7 Map P.20131013 (nt64) Xilinx Map Application Log File for Design 'system_VC707_stub' Design Information ------------------ Command Line : map -intstyle pa -w system_VC707_stub.ngd Target Device : xc7vx485t Target Package : ffg1761 Target Speed : -2 Mapper Version : virtex7 -- $Revision: 1.55 $ Mapped Date : Fri Apr 04 14:32:36 2014 WARNING:LIT:702 - PAD symbol "IBUFDSN_IN_pin" is not constrained (LOC) to a specific location. WARNING:LIT:701 - PAD symbol "ETHERNET_TXP_pin" has an undefined IOSTANDARD. Mapping design into LUTs... WARNING:MapLib:41 - All members of TNM group "FFS("system_VC707_i/interrupt_controller/interrupt_controller/INTC_CORE_I/in tr_sync*")" have been optimized out of the design. WARNING:MapLib:41 - All members of TNM group "FFS("system_VC707_i/interrupt_controller/interrupt_controller/INTC_CORE_I/in tr_p1*")" have been optimized out of the design. WARNING:MapLib:46 - The user-defined group "GRP_INTC_intr_sync_interrupt_controller" has been discarded, because all of its included elements were optimized out of the design. WARNING:MapLib:46 - The user-defined group "GRP_INTC_intr_p1_interrupt_controller" has been discarded, because all of its included elements were optimized out of the design. WARNING:MapLib:48 - The timing specification "TS_sync_interrupt_controller" has been discarded because its TO group (GRP_INTC_intr_sync_interrupt_controller) was optimized away. WARNING:MapLib:47 - The timing specification "TS_intr_sync_p1_interrupt_controller" has been discarded because both its FROM group (GRP_INTC_intr_sync_interrupt_controller) and TO group (GRP_INTC_intr_p1_interrupt_controller) were optimized away. Running directed packing... FATAL_ERROR:Pack:pk***arouter.c:146:1.20 - Failed to find a site named DIFFO_INUSED in the routing graph. For technical support on this issue, please visit http://www.xilinx.com/support. Design Summary -------------- Number of errors : 1 Number of warnings : 8 What is the best IOSTANDARD type to use with these pins? In the manual it is not specified. I have the doubt the .ucf file I modified in XPS is not updated in the PlanAhead environment and not took into account in the design. Moreover is the first warning regarding ethernet_wrapper connected to this problem? Thanks Giuseppe Gottardo |
|
|
|
|
只有小组成员才能发言，加入小组>>
2420 浏览 7 评论
2823 浏览 4 评论
Spartan 3-AN时钟和VHDL让ISE合成时出现错误该怎么办？
2294 浏览 9 评论
3374 浏览 0 评论
如何在RTL或xilinx spartan fpga的约束文件中插入1.56ns延迟缓冲区？
2461 浏览 15 评论
有输入，但是LVDS_25的FPGA内部接收不到数据，为什么？
1174浏览 1评论
请问vc707的电源线是如何连接的，我这边可能出现了缺失元件的情况导致无法供电
587浏览 1评论
求一块XILINX开发板KC705，VC707，KC105和KCU1500
451浏览 1评论
2005浏览 0评论
731浏览 0评论
/7 
关注我们的微信
下载发烧友APP
德赢Vwin官网 观察
版权所有 © 湖南华秋数字科技有限公司
德赢Vwin官网 （电路图） 湘公网安备 43011202000918 号 电信与信息服务业务经营许可证：合字B2-20210191
工商网监
湘ICP备2023018690号
7015
评论
淘帖
2015
