广陵云峰 发表于 2018-10-24 17:23
1 << 0:对bit0置1;
#define CLK_PCLKCR0_HRPWMENCLK_BITS (1 << 0) 的意思是使能HRPWM模块的时钟信号;
1 << 1:对bit1置1;(1左移1位)
麻烦再追问一下,在头文件中有
//! brief Defines the number of bits per INTSELxNy register //! #define ADC_INTSELxNy_NUMBITS_PER_REG 8
//! brief Defines the log2() of the number of bits per INTSELxNy register //! #define ADC_INTSELxNy_LOG2_NUMBITS_PER_REG 3
//! brief Defines the location of the INTSEL bits in the INTSELxNy register //! #define ADC_INTSELxNy_INTSEL_BITS (31 << 0)
//! brief Defines the location of the INTE bits in the INTSELxNy register //! #define ADC_INTSELxNy_INTE_BITS (1 << 5)
//! brief Defines the location of the INTCONT bits in the INTSELxNy register //! #define ADC_INTSELxNy_INTCONT_BITS (1 << 6)
//! brief Defines the location of the ACQPS bits in the ADCSOCxCTL register //! #define ADC_ADCSOCxCTL_ACQPS_BITS (63 << 0)
//! brief Defines the location of the CHSEL bits in the ADCSOCxCTL register //! #define ADC_ADCSOCxCTL_CHSEL_BITS (15 << 6)
//! brief Defines the location of the TRIGSEL bits in the ADCSOCxCTL register //! #define ADC_ADCSOCxCTL_TRIGSEL_BITS (31 << 11)
8在这里如何解释, (15 << 6)如何解释,是15位左移6位吗, (31 << 11),寄存器是最多32位吗,31位左移11位后变成什么了,不就又回到低位了?
谢谢