1
完善资料让更多小伙伴认识你,还能领取20积分哦, 立即完善>
大家好,
我正在尝试根据生成的报告文件确定我实现的初始化9k Block Ram的tcl命令是否正常工作。 我试图在tcl中实现基于AR#39999的“-g INIT_9K:YES”命令。 当我将开关设置为“YES”时,我在位源摘要中得到以下信息: 信息:Bitgen:341 - 此设计使用一个或多个9K Block RAM(RAMB8BWER)。 用户定义和默认的9K Block RAM初始化数据需要特殊的比特流格式。 有关更多信息,请参阅Xilinx答复记录39999。 但是,当我将开关设置为“NO”时,我不会在位序摘要中获得前面的信息行。 是否有其他方法来检查交换机是否正常工作,因为上面显示的info语句没有特别提到交换机已设置且未包含在“Bitgen选项摘要”中。 谢谢。 以上来自于谷歌翻译 以下为原文 Hi all, I'm trying to determine if the tcl command I've implemented to initialize the 9k Block Ram is working correctly based on the reports files generated. I've tried to implement the "-g INIT_9K:YES" command based on AR# 39999 in tcl. When I have the switch set at "YES", then I get the following info statment in the bit gen summary: INFO:Bitgen:341 - This design is using one or more 9K Block RAMs (RAMB8BWER). 9K Block RAM initialization data, both user defined and default, requires a special bit stream format. For more information, please reference Xilinx Answer Record 39999. However when I have the switch set at "NO", then I do not get the preceding info line in the bit gen summary. Is there some other way to check whether the switch is working correctly, since the info statement shown above does not specifiically mention that the switch has been set and it is not included in the "Summary of Bitgen Options". Thanks. |
|
相关推荐
7个回答
|
|
如果使用ISE版本13.2及更高版本,则启用@hadiiBy默认开关。
别担心 当设置为yes时,您可以缩放比特流大小,它将比设置为NO时更多(您必须在bitgen中设置此选项) -Pratham ------------------------------------------------ ----------------------------------------------请注意 - 请 如果提供的信息有用,请将答案标记为“接受为解决方案”。给予您认为有用并回复导向的帖子。感谢K- -------------------------------------------------- ----------------------- 以上来自于谷歌翻译 以下为原文 @hadii By default switch is enabled if using ISE version 13.2 and later . Dont worry You can comare the bitstream size when it is set to yes it would be more than when set to NO (you have to set this option in bitgen) -Pratham ---------------------------------------------------------------------------------------------- Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful. Give Kudos to a post which you think is helpful and reply oriented. ---------------------------------------------------------------------------------------------- |
|
|
|
嗨,
我没有看到比特流的大小有任何差异,所以似乎我实现的tcl命令不起作用。 你知道如何在tcl中实现BitGen选项-g INIT_9K:设置吗? 我使用了以下代码: 项目集“其他Bitgen命令行选项”“ - g INIT_9K:否”-process“生成编程文件” 但它似乎没有用。 谢谢。 以上来自于谷歌翻译 以下为原文 Hi, I did not see any difference in the size of the bitstream, so it seems that the tcl command I implemented is not working. Do you know how to implement The BitGen option -g INIT_9K:setting in tcl? I used the following code: project set "Other Bitgen Command Line Options" "-g INIT_9K:No" -process "Generate Programming File" but it didn't seem to work. Thanks. |
|
|
|
@hadiiDid你检查了字节大小?
比较字节大小和前一个字节大小。 如果这也是一样的,请告诉我们 -Pratham ------------------------------------------------ ----------------------------------------------请注意 - 请 如果提供的信息有用,请将答案标记为“接受为解决方案”。给予您认为有用并回复导向的帖子。感谢K- -------------------------------------------------- ----------------------- 以上来自于谷歌翻译 以下为原文 @hadii Did you checked the byte size? compare the byte size with the previous one. if this is also same let us know -Pratham ---------------------------------------------------------------------------------------------- Kindly note- Please mark the Answer as "Accept as solution" if information provided is helpful. Give Kudos to a post which you think is helpful and reply oriented. ---------------------------------------------------------------------------------------------- |
|
|
|
嗨Pratham,
我检查了两个文件的字节大小,它们完全一样。 我想我的tcl代码可能有问题吗? 以上来自于谷歌翻译 以下为原文 Hi Pratham, I checked the byte size of the two files and they were exactly the same. I'm thinking that maybe there is something wrong with my tcl code? |
|
|
|
请查看这些SRshttp://www.xilinx.com/support/answers/39999.htmlhttp://www.xilinx.com/support/answers/40529.html
谢谢和RegardsBalkrishan ----------------------------------------------- ---------------------------------------------请将帖子标记为 一个答案“接受为解决方案”,以防它有助于解决您的查询。如果一个帖子引导到解决方案,请给予赞誉。 以上来自于谷歌翻译 以下为原文 check these SRs http://www.xilinx.com/support/answers/39999.html http://www.xilinx.com/support/answers/40529.htmlThanks and Regards Balkrishan -------------------------------------------------------------------------------------------- Please mark the post as an answer "Accept as solution" in case it helped resolve your query. Give kudos in case a post in case it guided to the solution. |
|
|
|
嗨,
我已经查看了你列出的支持文件,但它们都没有显示如何在tcl中实现9K Init开关。 谢谢, 以上来自于谷歌翻译 以下为原文 Hi, I have already looked at the support files that you have listed, and neither of them show how to implement the 9K Init switch in tcl. Thanks, |
|
|
|
嗨,
上一篇文章中列出的tcl脚本对于设置9k_INIT开关是正确的。 另外,对于开关设置为YES的情况,与将开关设置为NO的情况相比,位流文件长度更长。 可能是之前的问题是由于设计没有合成任何9kRAM(仅18kRAM),因此在文件中没有注意到差异。 谢谢。 以上来自于谷歌翻译 以下为原文 Hi, The tcl script as listed in the previous post is correct for setting the 9k_INIT switch. Additionally, the bit stream file length is longer for the case when the switch is set to YES versus the case when the switch is set to NO. It may be that the previous problems were due to the design not synthesizing any 9kRAMs (only 18kRAMs), so no difference was noticed in the files. Thanks. |
|
|
|
只有小组成员才能发言,加入小组>>
2432 浏览 7 评论
2831 浏览 4 评论
Spartan 3-AN时钟和VHDL让ISE合成时出现错误该怎么办?
2300 浏览 9 评论
3379 浏览 0 评论
如何在RTL或xilinx spartan fpga的约束文件中插入1.56ns延迟缓冲区?
2471 浏览 15 评论
有输入,但是LVDS_25的FPGA内部接收不到数据,为什么?
1431浏览 1评论
请问vc707的电源线是如何连接的,我这边可能出现了缺失元件的情况导致无法供电
597浏览 1评论
求一块XILINX开发板KC705,VC707,KC105和KCU1500
463浏览 1评论
2016浏览 0评论
739浏览 0评论
小黑屋| 手机版| Archiver| 德赢Vwin官网 ( 湘ICP备2023018690号 )
GMT+8, 2024-12-31 02:14 , Processed in 1.297186 second(s), Total 56, Slave 50 queries .
Powered by 德赢Vwin官网 网
© 2015 bbs.elecfans.com
关注我们的微信
下载发烧友APP
德赢Vwin官网 观察
版权所有 © 湖南华秋数字科技有限公司
德赢Vwin官网 (电路图) 湘公网安备 43011202000918 号 电信与信息服务业务经营许可证:合字B2-20210191 工商网监 湘ICP备2023018690号