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CYW92070XV3EVAL评估板硬件用户指南称,CYW20706或CYW20707上的PIN BTXXTALYSTRAPGL0和BTXXTALYSTRAPGL1可以用来选择XTAL频率,并且它还表示在BTXXTALYSTRAP0SP0和BTXXTALYSTRAPHL1上的1的值使得CYW20706/07能够读取来自非易失性存储器。 问题: 你能帮助我理解如何将XTAL频率信息存储到非易失性存储器中吗?XTAL信息何时读取并应用?XTAL FRQ是如何使用的? 这将是非常有用的,如果你可以直接在WSDE SDK 5的地方,这已经完成了。 谢谢您, 普拉文库马 以上来自于百度翻译 以下为原文 Hi, CYW92070xV3_EVAL evaluation board hardware user guide says that pin BT_XTAL_STRAP_0 and BT_XTAL_STRAP_1 on CYW20706 or CYW20707 can be used to select XTAL frequency and it also says that the value of 1 on both BT_XTAL_STRAP_0 and BT_XTAL_STRAP_1 makes the CYW20706/07 to read the frequency from Non volatile memory. Question : Can you help me understand how to store XTAL frequency information into Non volatile memory ? When is this XTAL info read and applied ? How the XTAL freq used ? It would be very helpful if you can direct to place in WICED SDK 5.0 where this is already being done. Thank you, Pravinkumar |
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此配置是作为构建过程的一部分为您完成的。它由你使用的制作目标控制:
SNIP.BT.A2DPX-SIK-CYW920706WCDEVALFRY= 40MHz构建 在早期的SDK中,有完全独立的平台文件: A2DPIXNK-BCM920706YP44040MHZ A2DPIXNK-BCM920706P42424MHz构建 雅各伯 以上来自于百度翻译 以下为原文 This configuration is done for you as part of the build process. It is controlled by the make target you use: snip.bt.a2dp_sink-CYW920706WCDEVAL FREQ=40Mhz build In earlier SDKs, there are separate platform files entirely: a2dp_sink-BCM920706_P49_40MHz build a2dp_sink-BCM920706_P49_24MHz build Jacob |
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twerfwerw 发表于 2018-11-15 08:48 得到了,我正在使用的SDK有单独的平台文件。 我使用的是CYW20706,我想提供18MHz晶体,请帮助我理解IOWH如何将这个配置写入非易失性存储器中,顺便说一下,我不使用与EVE板相同的闪存。 请与我分享一个完全解释这个过程的医生。 谢谢你 以上来自于百度翻译 以下为原文 Got it, the SDK I am using has got separate platform files. I am using CYW20706 and I would like to provide 18MHz crystall, Please help me understand ihow this configuration is written into non volatile memory and by the way I am not using the same flash memory as it is in eval board. Please share with me a doc that explains this procedure completely. Thank you |
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晒肥城之乐 发表于 2018-11-15 09:06 我们只支持20MHz,24MHz和40MHz晶体为20706。 雅各伯 以上来自于百度翻译 以下为原文 We only support 20MHz, 24MHz, and 40MHz crystals for 20706. Jacob |
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但是,20706数据表表示,它可以支持固件配置(从串行闪存或EEPROM读取)支持20MHz、24MHz和40MHz以外的频率。 ——Pravin 以上来自于百度翻译 以下为原文 But, the 20706 data sheet says that it can support frequencies other than 20MHz, 24MHz, and 40MHz by firmware configuration (reading from serial flash or EEPROM). --Pravin |
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晒肥城之乐 发表于 2018-11-15 09:26 正确的是,芯片能够具有其他晶体频率(“19.2~52兆赫,在2 ppm的台阶”),但是,我们不支持这些频率在WICE中。您需要一个自定义的FW配置,这将需要在论坛范围之外的专用支持。 此外,我们强烈建议使用XTAL频率,我们已经测试了在我们这边。强烈推荐使用20, 24或40MHz。 雅各伯 以上来自于百度翻译 以下为原文 Correct, the chip is capable of other crystal frequencies ("19.2–52 MHz in 2 ppm steps"), however, we do no support these frequencies in WICED. You will need a custom FW config for this which will require dedicated support outside the scope of the forum. Furthermore, we strongly advise using the xtal frequencies that we have tested on our side. Using 20, 24, or 40MHz is highly recommended. Jacob |
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twerfwerw 发表于 2018-11-15 09:35 嗨,我有个问题和这个问题有关。据我所知,无论使用20, 24还是40MHz,芯片总是以96MHz的速度运行。IDE中的配置文件将处理它。对吗? 以上来自于百度翻译 以下为原文 Hi, I have a question related to this issue. As I understand it, no matter 20, 24, or 40MHz is used, the chip will always run at 96MHz. The configuration file in IDE will handle it. Is that correct? |
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uryyywerw 发表于 2018-11-15 09:43 是的,你是对的。核心将运行96 MHz的时钟,用户不必担心这一点。内部电路将负责这一点。 以上来自于百度翻译 以下为原文 Yes, you are correct. The core will run off a 96 MHz clock and the user need not worry about this. The internal circuitry will take care of this. |
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我们已经填充了一个24 MHz的晶体和大致正确的负载上限晶体(一对15 PF上限的晶体,预计9 PF)对我们的20706实施。我们已经设置了一个24兆赫晶体XTalthSouthLead正确。我已经用近场探测器证实晶体振荡在24兆赫。
当我们进入制造测试模式,并要求在2.402 GHz的连续传输时,音调以2.56708 GHz为中心。在我的经验,这是太远,以纠正与晶体负载上限调整,所以我会得出结论,制造测试模式预计20兆赫晶体,并忽略XTalthSuffLISH线。 这是正确的吗? 以上来自于百度翻译 以下为原文 We've populated a 24 MHz crystal and roughly the correct load caps for the crystal (a pair of 15 pF caps for a crystal that expects 9 pF) on our 20706 implementation. We've set the XTAL_STRAP lines correctly for a 24 MHz crystal. I've verified with a nearfield probe that the crystal is oscillating at 24 MHz. When we enter manufacturing test mode, and request a continuous transmission at 2.402 GHz, the tone is centered at 2.56708 GHz. In my experience, this is too far out to correct with adjustments to the crystal load caps, so I would conclude that the manufacturing test mode expects a 20 MHz crystal, and ignores the XTAL_STRAP lines. Is this correct? |
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recoltd 发表于 2018-11-15 10:14 我刚刚确认了基于ROM的HCI代码存在问题,因为它期望一个20 MHz的晶体并且忽略引导引脚。我用24 MHz晶体替换了我们的20 MHz晶体,并相应地更换了Bootstrap XTAR电阻器。而命令“MBT SETIGTXYFACECONYSIGY ARM 1,2402,5,3,3”原来是2.56708的音调,现在它给出了2402赫兹的正确音调。 以上来自于百度翻译 以下为原文 I just confirmed that there is a problem with the ROM-based HCI code, in that it expects a 20 MHz crystal and ignores the bootstrap pins. I replaced our 24 MHz crystal with a 20 MHz crystal and swapped the bootstrap xtal resistors accordingly. Whereas the command "mbt set_tx_frequency_arm 1 2402 5 3 3" was formerly resulting in a 2.56708 tone, it now gives the proper tone at 2402 MHz. |
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