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我正在尝试使用FPGA固件加载来实现FX3 SLIFO应用程序,这是基于CuffFPGALaveFIFtiFNC的例子。如在示例中,FX3在SLIFO应用程序和CuffFPGA应用程序之间进行周期切换。问题是,我只能做FPGA固件一次加载。下一个则不做USB端点和GPIF之间的DMA传输。 我已经通过有效地删除SLIFO应用程序和重复重新配置和终止CONTAPP来解决这个问题。看起来,问题的根源是禁用CONTIFFPGA应用程序(CYU3PSSETCONFIG)的USB端点,并且在重新启动时禁用它。如果第一次初始化EP我使它活跃,我可以做多个FPGA重新配置。所有其他资源(DMA通道、GPIF状态机、GPIF套接字)都被释放和重新启动而没有问题。 你有什么想法,问题的原因是什么? 下面是形成恢复-终止循环的关键功能。FcTestPt是FX3固件init中的0,在第一次成功的FPGA固件加载后更改为1。没有“如果”!FCATTEPT)重复FPGA FW加载失败的条件。我删除了所有状态检查,使代码引用更短。 虚空StaskFPGAApp(无效) { UTI1616T尺寸=0; CYU3-肽组氨酸EpCFG; CYU3PDMACHANNEL CONTICONT DMACFG; CYU3PRESTROSTATUS SWT APIRTYSTATION CYU-U3PY成功; UIT88T突发长度=0; InCuffPfPGAppAd();/ /有效调用gpFixDead函数(包括在下面) ApItReStase= USPTrimePARAMS(大小; CYU3PMESET((UIT88T**)和EPCFG,0,SIZEF(EPCFG)); EpCF.Eng= Cytru. EpCFE.EpType=CYU-U3PUS; 爆裂; EFCFG流=0; PCKTSIZE=大小; 如果(!)F/CATTAMPT)/ /如果没有此条件,并且INTSCONTIOFFPGAAPP,重复加载失败 { ApItReStase= CYU3PSEPTECOFIG(CyfxxEppEuthor,and EpCFG); } ApItReStase= Cyu3PuSbStESESEQNUM(CyfxxEppEngulver,SeqNuthSLIFIFO); 尺寸=尺寸* DMACFG计数=DMAI Buffelyl计数; DMACFG.PRDCSKID= FPGA-CONTIONPROPARDER SOCKET; DCMAFG.CasScQue= FPGA-CONTIONCuffer-Sub套接字; DMACGF.DMAMODE=CYU-U3PY-DMAYMODEEY字节; DMACFG通知= CYU-U3PYDMABCBYPRODYL事件; DMACFG.CB=FPGopopdMcCalBACK; DMACG.PRODHead=0; DMACGF.PRODHOPETER=0; DMACGF.CONSEADADER=0; DMACFG。 ApItReStase= CYU3PDMACHANNEL CREATE(&DMAHNDFPGALADADES2BCPU,CYU-U3PYDMAX Type手册,和DMACFG); CYU3PUBFLUSSHEP(CyfxxEpEl生产者); ApItReStase= CYU3PDMACHANNEL SETXFER(&DMAHNDFPGALADADES2B2CPU,0); 活性=活性; } 无效停止配置FPGAP(无效) { CYU3-肽组氨酸EpCFG; CYU3PRESTROSTATUS SWT APIRTYSTATION CYU-U3PY成功; 激活=CyFrE; CYU3PUBGETEPESEQNUM(CyfxxEppEuthor,and SeqNuMuthSLIFFO); ApItReStase= CYU3PUBFLUSSHEP(CyfxxEpHePb); ApItReStase= CYU3PDMACHANNELSERDER(和DMAHNDFPGALADADES2B2CPU); ApItReStase= CYU3PDMACHANNEL销毁(&DMANNDFPGALADADES2B2CPU); 如果(!)FCATMTEPT) { CYU3PMESET((UIT88T**)和EPCFG,0,SIZEF(EPCFG)); EpCF.Eng= CyFLY; ApItReStase= CYU3PSEPTECOFIG(CyfxxEppEuthor,and EpCFG); } } 无效配置 { CYU3PRESTROSTATUS SWT APIRTYSTATION CYU-U3PY成功; ApItReStase= gpField配置(GPIFICONTIOFFPGAGAFWYLoad); } CYU3PRESTROSTATUS SOT GPIFCONDATION(FX3GPIFICONFIGGPIFICONFIG) { CYU3预适应状态; CYU3PPIBCCRYLYT PiBoCH; CYU3PGPIFCONTIONT**GPIFICONFIG; UIT88T GPIFFA状态指数; UIT88T gpIFIILIALALLα; 静态CybOLLT GPIFIAc能能能行= CyFLY; 静态细胞周期; If(GPIFIAcAc能能能行) { CYU3PGPF不能(Cyress); GPIFIAc能能能行= CyFLUE; } If(Pib-激活) { 状态= CYU3pPIbDEIN(); PibAc能能能行= CyFrE; } 开关(GPIFICONFIG){ 案例GPIFICONTIOSLIFFO: /…无关的 断裂; 案例GPIFICONTIOFFPGAYFWYLoad: GPIFICONFIG=和LoopFPGAGPIFCOFIGIG; GPIFIAtStEnEx索引=FPGA-FWYLoad启动; GPIFIILIALALLα=FPGA-FWYLoadαp启动; Dbg(4,“GPIF=FPGA FW负载n”); 断裂; 案例gpIFICONTIGION禁用: 返回CYU-U3PL成功; 违约: 返回CyuU3PyErrRoad BADKY参数; } PIKCROCK。CKDIVI=2; PIKCROCK.CKSRC= CYU-U3PySysLCK; PiccLo.IsAlfDIV=CyFLY; PiBcLo.ISDLLUnEng= CyFLUE; 状态= CYU3PPIBIT(Cytrue&PiBeCH); PibcAc活性=Cyress; 状态= CYU3PGPIFFLUAD(GPIFICONFIG); If(gpIFICONFIG==GPIFIOFFIX) { /…无关的 } 其他的 If(gpIFICONFIG==GPIFICONFIXFPGAYFWYLoad) { 状态= CYU3PGPIFSOCKETHORD(3,FPGA-CONTIONCOMPULIONER SOCKET,7,CYFALSE,1); } GpIFIAc能能能动=胞质; 状态= CYU3PGPIFSMSTART(gpIFOSTATEOX索引,GPIFIN初始化ALPHAα); 返回CYU-U3PL成功; } 以上来自于百度翻译 以下为原文 Hi, all! I'm trying to implement FX3 SLFIFO app with FPGA Firmware loading, based on ConfigFpgaSlaveFifoSync example. As in the example, the FX3 works in cycle-switching between SLFIFO App and ConfigFPGA App. The problem is, I can do FPGA Firmware loading only once. The next one just doesn't do the DMA transfer between USB endpoint and GPIF. I have zeroed in on the problem by effectively removing the SLFIFO App and just repeating the reinitialization and termination of ConfigApp. It looks, that the source of the problem is disabling the USB Endpoint on termination of ConfigFPGA App(CyU3PSetEpConfig) and than reeanabling it on restart. If, after first time initialization of EP I leave it active, I can do multiple FPGA reconfiguration. All other resources (DMA Channel, GPIF State machine, GPIF Socket) are being released and reinitiated without problem. Do you have an idea, what can be the cause of the problem? Below are crucial functions forming the reintialization - termination cycle. 'fcattempt' is 0 at FX3 firmware init and changes to 1 after first successful FPGA firmware load. Without 'if (!fcattempt)' condition the repeated FPGA FW loading fails. I have removed all the status checks, to make code citation shorter. void startConfigFpgaApp(void){ uint16_t size = 0; CyU3PEpConfig_t epCfg; CyU3PDmaChannelConfig_t dmaCfg; CyU3PReturnStatus_t apiRetStatus = CY_U3P_SUCCESS; uint8_t burstLength =0; initConfigFpgaApp(); //effectively calling gpifConfigure function (included below)apiRetStatus = u***TransferParams(&size, &burstLength); CyU3PMemSet ((uint8_t *)&epCfg, 0, sizeof (epCfg)); epCfg.enable = CyTrue; epCfg.epType = CY_U3P_USB_EP_BULK; epCfg.burstLen = burstLength; epCfg.streams = 0; epCfg.pcktSize = size; if (!fcattempt) //without that condition here and int stopConfigFpgaApp, the repeated loading fails{apiRetStatus = CyU3PSetEpConfig(CY_FX_EP_PRODUCER, &epCfg);} apiRetStatus = CyU3PU***SetEpSeqNum(CY_FX_EP_PRODUCER, seqnum_slfifo); dmaCfg.size = size * BURST_LEN; dmaCfg.count = DMA_BUFFER_COUNT; dmaCfg.prodSckId = FPGA_CONFIG_PRODUCER_SOCKET; dmaCfg.consSckId = FPGA_CONFIG_CONSUMER_SOCKET; dmaCfg.dmaMode = CY_U3P_DMA_MODE_BYTE; dmaCfg.notification = CY_U3P_DMA_CB_PROD_EVENT; dmaCfg.cb = FpgaUtoPDmaCallback; dmaCfg.prodHeader = 0; dmaCfg.prodFooter = 0; dmaCfg.consHeader = 0; dmaCfg.prodAvailCount = 0; apiRetStatus = CyU3PDmaChannelCreate (&dmahndFpgaLoadUSB2CPU,CY_U3P_DMA_TYPE_MANUAL, &dmaCfg); CyU3PU***FlushEp(CY_FX_EP_PRODUCER); apiRetStatus = CyU3PDmaChannelSetXfer(&dmahndFpgaLoadUSB2CPU, 0); glIsApplicationActive = CyTrue;}void stopConfigFpgaApp(void){ CyU3PEpConfig_t epCfg; CyU3PReturnStatus_t apiRetStatus = CY_U3P_SUCCESS; glIsApplicationActive = CyFalse; CyU3PU***GetEpSeqNum(CY_FX_EP_PRODUCER, &seqnum_slfifo); apiRetStatus = CyU3PU***FlushEp(CY_FX_EP_PRODUCER); apiRetStatus = CyU3PDmaChannelReset(&dmahndFpgaLoadUSB2CPU); apiRetStatus = CyU3PDmaChannelDestroy (&dmahndFpgaLoadUSB2CPU); if (!fcattempt) {CyU3PMemSet ((uint8_t *)&epCfg, 0, sizeof (epCfg));epCfg.enable = CyFalse;apiRetStatus = CyU3PSetEpConfig(CY_FX_EP_PRODUCER, &epCfg); }}void initConfigFpgaApp(void){CyU3PReturnStatus_t apiRetStatus = CY_U3P_SUCCESS;apiRetStatus = gpifConfigure(GPIF_CONFIG_FPGA_FW_LOAD);}CyU3PReturnStatus_t gpifConfigure(Fx3_Gpif_Config Gpif_Config){ CyU3PReturnStatus_t status; CyU3PPibClock_t pibClock; const CyU3PGpifConfig_t *gpif_config; uint8_t gpif_state_index; uint8_t gpif_initial_alpha; static CyBool_t gpif_active = CyFalse; static CyBool_t pib_active = CyFalse; if (gpif_active) { CyU3PGpifDisable(CyTrue); gpif_active = CyFalse; } if (pib_active) { status = CyU3PPibDeInit(); pib_active = CyFalse; } switch (Gpif_Config) { case GPIF_CONFIG_SLFIFO: //... irrelevant break; case GPIF_CONFIG_FPGA_FW_LOAD: gpif_config = &loadFPGAGpifConfig; gpif_state_index = FPGA_FW_LOAD_START; gpif_initial_alpha = FPGA_FW_LOAD_ALPHA_START; Dbg (4, "GPIF = FPGA Fw Loadn"); break;case GPIF_CONFIG_DISABLED: return CY_U3P_SUCCESS; default: return CY_U3P_ERROR_BAD_ARGUMENT; }pibClock.clkDiv = 2;pibClock.clkSrc = CY_U3P_SYS_CLK;pibClock.isHalfDiv = CyFalse;pibClock.isDllEnable = CyFalse;status = CyU3PPibInit(CyTrue, &pibClock); pib_active = CyTrue; status = CyU3PGpifLoad(gpif_config); if(Gpif_Config == GPIF_CONFIG_SLFIFO) {// ... irrelevant } else if(Gpif_Config == GPIF_CONFIG_FPGA_FW_LOAD) { status = CyU3PGpifSocketConfigure (3,FPGA_CONFIG_CONSUMER_SOCKET,7,CyFalse,1); } gpif_active = CyTrue; status = CyU3PGpifSMStart (gpif_state_index,gpif_initial_alpha); return CY_U3P_SUCCESS;} |
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你好,
你能把你的固件贴在这里吗? 当做, -马杜 以上来自于百度翻译 以下为原文 Hi, Can you please attach your whole firmware here, with the changes you made? Regards, -Madhu |
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