Verilog示例:
总是@(posedge clock)计数器
是的,这使用LUT,但它也使用寄存器。
寄存器对于实现计数器非常有用。
- 鲍勃埃尔金德
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以上来自于谷歌翻译
以下为原文
Verilog example:
always@(posedgeclock) counter <= upcount ? counter + 1 : counter - 1 ;
Yes, this uses LUTs, but it also uses registers. Registers are quite useful for implementing counters.
-- Bob Elkind
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