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你好，
我有一般的建筑问题。 我正在开发一个带有主处理器和Spartan 6 FPGA的定制PCB。 在正常操作期间，主机处理器通过简单的UART总线从FPGA读取数据。 我希望能够绕过主机处理器并直接用我的笔记本电脑连接到FPGA。 现在，我将UART信号限制为两个引脚，这些引脚被路由到调试连接器。 困难在于如何使用两个源（板载处理器ORdebug电缆）驱动RX模块输入（见下图）。 在pcb上，我没有任何规定来切换2：1 MUX（跳线等），所以我想避免这种情况。 有没有办法让工具允许RX模块的输入由两个源驱动？ 我知道这不是一般的不会产生错误，但我想不出任何其他解决方法。 物理短路将很困难，因为内部UART跟踪未暴露。 我想的越多，我就越相信我需要一个MUX（在FPGA逻辑中）和一个硬件跳线。 任何人都可以认为一个聪明的解决方案，因为我没有办法在硬件上切换MUX吗？ 谢谢， Ĵ 以上来自于谷歌翻译 以下为原文 Hello, I have a general architectural question. I am bringing up a custom PCB with a host processor and Spartan 6 FPGA. During normal operation, the host processor reads data from the FPGA over a simple UART bus. I want the ability to bypass the host processor and connect to the FPGA directly with my laptop. Right now, I have the UART signals constrained to two pins that are routed to a debug connector. The difficulty is how to drive the RX module input (see diagram below) with two sources (the on board processor OR debug cable). On the pcb, I don't have any provisions to switch a 2:1 MUX (jumper, etc.) so I'd like to avoid that. Is there a way for the tools to allow the input to RX module be driven by two sources? I know this is a no no in general and generates an error but I can't think of any other workaround. A physical short circuit would be difficult because the internal UART traces a not exposed. The more I think about it the more I am convinced I need a MUX (in the FPGA logic) and a hardware jumper. Can anyone think a clever solution conidering I don't have a way in hardware to switch the MUX? Thanks, J 
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如果您有任何形式的开关或跳线输入到FPGA，那么您可以在UART_RX前面放置一个MUX，以便在两个源之间进行选择。
但如果你没有这个，那么你将不得不提出一个不同的计划。 一种侵入性较小（但可能不充分）的解决方案是拥有两个不同的FPGA负载（比特流）。 它们之间唯一不同的是输入到RX_MODULE的引脚位置（当你在TX_MODULE时）; 在一次加载时，它们将连接到RX_D和TX_D，而在另一次加载时，它将是RX_I和TX_I。 然后，您可以通过下载不同的比特流（例如，使用USB编程器）在它们之间切换。 但这是一个非常慢的切换，并且会在切换期间（有效地）重置FPGA（因此我可以看到这可能不是一个充分的解决方案）。 另一种解决方案将更具“建筑性”。 （我不知道你的RX_MODULE是否仅仅是UART部分，或者RX_MODULE中是否有UART RX，所以我不知道我提出的是否在RX_MODULE的输出或其内部的某处， UART RX将数据传递给RX_MODULE中完成的其余处理。 由于UART的工作方式，UART接收的连续字符之间可能有数千（甚至数十万）个时钟。 如果（可能是这种情况）你的UART RX通过在新字符就绪时为一个时钟断言“data_valid”信号来指示新字符的可用性，那么你可以执行以下操作...... 而不是实例化一个UART RX模块，实例化两个。 将一个连接到RX_D，另一个连接到RX_I。 只要其中任何一个获得一个字符，它就会发出“data_valid”信号。 或者将两个data_valid信号放在一起，但是使用其中一个作为UART RX模块生成的字符之间的MUX选择。 通过这种方式，您可以处理来自UART接收器的字符 - 因为您一次只能使用一个，这将起作用。 Avrum 以上来自于谷歌翻译 以下为原文 If you had any form of a switch or jumper input to your FPGA then you could put a MUX in front of the UART_RX to select between the two sources. But if you don't have this then you will have to come up with a different plan. A less invasive (but probably not sufficient) solution would be to have two different FPGA loads (bitstreams). The only thing that would be different between them is the pin placement for the input to the RX_MODULE (and while you are at it TX_MODULE); on one load it they would be connected to RX_D and TX_D, and on the other load it would be RX_I and TX_I. You could then switch between them by downloading the different bitstreams (say, using the USB programmer). But this is a very slow switch over and would result in (effectively) resetting your FPGA during the switchover (so I can see that this might not be a sufficient solution). The other solution will be more "architectural". (I don't know if your RX_MODULE is just the UART part, or if there us a UART RX inside the RX_MODULE, so I don't know if what I am proposing goes at the output of the RX_MODULE or somewhere inside it, where the UART RX passes data to the rest of the processing done in RX_MODULE). Because of the way that UARTs work, there are likely thousands (or even hundreds of thousands) of clocks between consecutive characters received by the UART. If (which is probably the case) your UART RX signals the availability of a new character by asserting a "data_valid" signal for one clock when a new character is ready, then you can do the following... Instead of instantiating one UART RX module, instantiate two. Have one connected to RX_D and the other to RX_I. Whenever either one of them gets a character it will pulse its "data_valid". OR the two data_valid signals together, but use one of them as a MUX select between the characters generated by the UART RX modules. This way you could process characters coming from either UART receiver - since you will only use one at a time, this will work. Avrum |
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优秀的建议！
实例化两个UART RX模块并对数据有效信号进行“或”操作并使用它来控制MUX将完成工作。 以上来自于谷歌翻译 以下为原文 Excellent suggestion! Instantiating two UART RX modules and ORing the data valid signals and using this to control a MUX will get the job done. |
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