在CAN和USB定制设计上躲避PSoC3 ES2 MHz ECO XTAL启动项目

设计了一个PSoC3设备控制板，并用CY8C3666 AXI-040ES2部分实现了多个副本。一个单元旨在通过USB连接到主机。额外的单位是菊花链通过CAN总线连接器从托管单元。
该设计需要一个精确的MaskLCK和BuSyCLK。这个精度是从外部MHz的晶体振荡器导出的，它被配置成在PSoC3中驱动IMO。
在调试了多个板之后，我确定了CAN总线对于任何一个自上电以来没有连接到USB的板具有极高的错误率。调查，包括勘误表和博客/ 论坛项目报告问题的MH2外部振荡器（ECO）启动ES2部分。
对我不好。
一个USB主机不知辅助启动瞬间接触，所以它需要一段时间来确定生态并不总是开始。它可以重新开始，所以它的工作，但没有可靠地对自己这样做。
一旦我的勘误表和otherblog消息，icooked以下工作：
（一）配置芯片振荡器运行从理论史。这是太innacurate可以，但启动PSoC芯片。的晶振时钟没有连接到时钟树，但仍然是可接受的。
（2）加两系统时钟组件，每一个25千赫的频率时钟。一（xtal_mon）逐出24MHz外部振荡器、其他（mclk_mon）驱动从系统总线48 MHz master_clk。
（3）添加2状况登记（status_reg_clkmon），主频由48mhz bus_clk样本两25 kHz时钟。固件可采样25 kHz时钟速度不够快，不能错过的边缘。
（4）让自动生成的clocksetup()功能正常运行。它将无法启动的生态，但我们不使用它。
（五）直到ecostarts，定期（100毫秒的间隔），暂停计数慢源25KHz时钟使用status_reg_clkmon时钟边缘。停下来的时候，themclk_mon时钟产生100边。你最好是从mclk_mon开始计数，或你的代码不执行。这大约需要2毫秒。看看这两方面的匹配公差（如5%），即，如果从xtal_mon伯爵是95 105之间。如果是这样的话，宣布水晶开始。
（6）系统时钟树切换到外部生态，从clocksetup()是由于配置更改删除报表（1）。
/ /配置IMO使用晶振作为源cy_set_reg8（（void xdata *）（cydev_clkdist_cr），0x40）；cy_set_reg8（（void xdata *）（cydev_fastclk_imo_cr），0x70）；cy_set_reg8（（void xdata *）（cydev_clkdist_cr），0x40）；
完成！



以下为原文
I designed a PSoC3 device control board and implemented several copies with CY8C3866AXI-040ES2 parts. One unit is intended to connect to a host via USB. Extra units are daisy chained via CAN BUS connectors from the hosted unit.
The design requires an accurate MASTER_CLK and BUS_CLK. This accuracy was intended to be derived from an external MHz crystal oscillator, which had been configured to drive the IMO in the PSoC3.
After debugging several boards, I determined that the CAN BUS had an extremely high error rate for any board which had not been connected to USB since power up. Inves tigating, I found errata and blog/forum items which report problems with MHz external oscillator (ECO) startup on ES2 parts.
Not good for me.
Momentary contact with a USB host somehow assisted the startup, so it took a while to determine that the ECO was not always starting. It could start, so it worked, but did not reliably do so on its own.
Once I read the errata and other blog messages, I cooked up the following work around:
(1) Configure the IMO to run from the on-chip oscillator. This is too innacurate for CAN, but starts the PSoC chip. The XTAL clock is not connected to the clock tree, but is still accessable.
(2) Add two System Clock components, each 25 kHz frequency clocks. One (XTAL_MON) driven from the 24MHz external oscillator, the other (MCLK_MON) driven from the system 48 MHz MASTER_CLK bus.
(3) Add a 2-bit status register (Status_Reg_ClkMon), clocked by 48MHz BUS_CLK to sample the two 25 KHz clocks. Firmware can sample the 25 kHz clock fast enough to not miss edges.
(4) Let the auto generated ClockSetup() function run normally. It will fail to start the ECO, but we are not using it yet.
(5) Until the ECO starts, periodically (at 100 millisecond intervals), pause to count clock edges of the slow derived 25 kHz clocks using Status_Reg_ClkMon. Stop when the MCLK_MON clock generates 100 edges. You better be getting counts from MCLK_MON, or your code is not even executing. This should take about 2 milliseconds. Check to see if both counts match to some tolerance (like 5 percent), that is, if the count from XTAL_MON is between 95 and 105. If so, declare the crystal started.
(6) Switch the system clock tree to the external ECO, with statements from ClockSetup() which are removed as a result of the configuration change in (1).
// reconfigure the IMO to use the XTAL as the source
CY_SET_REG8((void xdata *)(CYDEV_CLKDIST_CR), 0x40);
CY_SET_REG8((void xdata *)(CYDEV_FASTCLK_IMO_CR), 0x70);
CY_SET_REG8((void xdata *)(CYDEV_CLKDIST_CR), 0x40);

Done!