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最大的从属FIFO大小可以配置到端点吗?什么事件触发从FIFO和端点之间的DMA(从属FIFO满/空或端点缓冲器满/空)?如何中止DMA? 谢谢 以上来自于百度翻译 以下为原文 Hi Guys, what max size of slave fifo can I configure to an endpoint? what event triggers the DMA between slave fifo and endpoint( slave fifo full/empty or endpoint buffer full/empty)? how to abort the dma? Thanks |
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CYU3PDMABUFFER的尺寸变量为16位。这将是缓冲区大小的限制。
一旦接收到USB分组(整个分组),它将被发送。 你看过CYU3PDMACHANNSORT了吗?? 当做, 阿南德 以上来自于百度翻译 以下为原文 The size variable of CyU3PDmaBuffer_t is 16-bit. This would be the restriction of buffer size. Once a USB packet (entire packet) is received it will be transmitted. Have you looked at CyU3PDmaChannelAbort?? Regards, Anand |
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在通过断言PKACK硬件信号来终止短分组的情况下,也触发从从属FIFO转移到端点的数据(手动模式)的事件吗?
以上来自于百度翻译 以下为原文 Is the event for transferring data (manual mode) from slave fifo to IN endpoint also triggered in the case of terminating a short packet by asserting PKTEND hardware signal? |
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阿南德,谢谢你的回复。
如果从FIFO的FIFO大小受到CYU3PDMABUFFER的限制,则意味着从FIFO物理尺寸可以配置为64千字节。如果从FIFO是空的。外部处理器可以在没有中断的情况下传输64字节的块数据,是真的吗? 谢谢! 测向员 以上来自于百度翻译 以下为原文 Anand, Thanks for your reply. if the slave fifo size is limit by CyU3PDmaBuffer_t, it means the slave fifo physical size can be configured to 64KBytes. if the slave fifo is empty. the external processor can transfer a block data of 64KBytes without any interrupt, is it true? thanks! diagman |
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如果在GPIF和AN类型端点之间有一个自动的DMAGRANT设置,如果GPIFETCH的结尾与端点上的包长度完全相同,那么我能产生ZLP(零长度包)吗?
例如,我有GPIFIAN作为消费者。在PKKAND信号被断言之前,它得到1500字节的传输。假设端点有1024个数据包大小。我希望主机获得一个1024字节的数据包,接着是476字节的数据包。这是正确的吗? 现在如果在pkTrand信号被断言之前在gpIFI上得到1024的转移会发生什么。在1024字节的帧进入主机后,是否可以发送一个ZLPPAD?旧的FX2有一个插入ZLPS的机制,如果PKStand在UBPACK包的边界上声明。 以上来自于百度翻译 以下为原文 If I have an automatic DMA channel set between the GPIF and an IN type endpoint, can I have ZLP (zero length packet) produced, if the end of the GPIF transfer is exactly the same size as the packet length on the endpoint? For example, I have the GPIF acting as consumer. It gets a 1500 byte transfer before the PKTEND signal is asserted. Assume the IN endpoint has a 1024 packet size. I would expect the host to get a 1024 byte packet followed by a 476 byte packet. Is this correct? Now what happens if I get 1024 transfer on the GPIF before the PKTEND signal is asserted. Can I get a ZLP sent after the 1024 byte frame goes to the host? The old FX2 had a mechanism for inserting ZLPs, if the PKTEND was asserted on a boundary of the USB packet size. |
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我已经回答了上面提到的部分问题。GPIF可以在一定条件下生成ZLP。根据apnote an65974,我们可以生成一个zlpby主张pktend,而不主张SLWR。
这意味着外部处理器需要注意的u***packet大小如果是生成ZLP。有没有一种方法可以从ARM处理器生成ZLPU? 以上来自于百度翻译 以下为原文 I have answered part of the ZLP question I posted above. The GPIF can generate a ZLP under certain condition. According to the apnote AN65974, we can generate a ZLP by asserting PKTEND, while not asserting SLWR. This means the external processor needs to be aware of the USB packet size if it is to generate a ZLP. Is there a way we can generate a ZLP from the ARM processor? |
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如果您推迟PKTHOSTROBLE,您不必查看包大小。我们正在使用这个机制在FPGA到FX2连接。在数据包的最后一个字之后的4个IFCKLATE,我们产生PKKANT频闪,并且不在这个时间传送更多的数据。在传输了512字节的倍数的情况下,生成ZLP。如果大小小于全分组,则在没有ZLP的情况下进行分组。如果ZLP被允许在FX2固件中,这很好。我认为它将同样适用于FX3。
以上来自于百度翻译 以下为原文 If you delay the PKTEND strobe you do not have to look at the packet size. We are using this mechanism at the FPGA to FX2 connection. 4 IFCLK cycles after the last word of the packet we generate the PKTEND strobe and do not transfer further data in this time. In the case there were a multiple of 512 bytes transferred a ZLP is generated. If the size was smaller then a full packet, the packet is commited without ZLP. This works great if the ZLP are allowed in the FX2 firmware. I think it will work on the FX3 in the same manner. |
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