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你好;
我从4DSP获得了带有高速DAC / ADC型FMC150的XC7K325TFFG900-2评估板,我设计了一个带输入和输出端口的型号。 我的问题如何定义KC705 I / O到FMC 150端口,可以兼容4DSP子卡,因此可用于在Vivado 2015.4.2中发送和接收数据。 请了解有关如何在Vivado中使用子卡配置FMC 150 I / O的信息。 问候 以上来自于谷歌翻译 以下为原文 Hi; I got XC7K325TFFG900-2 evaluation board with high-speed DAC/ADC type FMC150 from 4DSP and I was Design a model with input and output port. my questions how can define the KC705 I/O to FMC 150 port that can be compatible with 4DSP daughter card so can be used to send and receive data in Vivado 2015.4.2. Please do have information about how can configure the FMC 150 I/O with daughter card in Vivado. Regards |
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您好,两个FMC连接器都是标准VITA57.1相应的约束IO,您可以参考以下UG页面#56http://www.xilinx.com/support/documentation/boards_and_kits/kc705/ug810_KC705_Eval_Bd.pdf此外您还可以参考
到附录CMaster约束文件列表-Shreyas -------------------------------------------------- --------------------------------------------尝试搜索你的答案 在发布新帖子之前在论坛或xilinx用户指南中发出问题。请注意 - 如果提供的信息解决了您的问题,请将答案标记为“接受为解决方案”。给予您认为有用的帖子给予荣誉(右边提供的星号) 并回复.---------------------------------------------- ------------------------------------------------ 在原帖中查看解决方案 以上来自于谷歌翻译 以下为原文 Hello, Both FMC connectors are of standard VITA57.1 to constraint IO accordingly, you can refer to following UG page #56 http://www.xilinx.com/support/documentation/boards_and_kits/kc705/ug810_KC705_Eval_Bd.pdf Also along with this you can refer to Appendix C Master Constraints File Listing -Shreyas---------------------------------------------------------------------------------------------- Try to search answer for your issue in forums or xilinx user guides before you post a new thread. Kindly note- Please mark the Answer as "Accept as solution" if information provided solves your query. Give Kudos (star provided in right) to a post which you think is helpful and reply oriented. ----------------------------------------------------------------------------------------------View solution in original post |
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您好,两个FMC连接器都是标准VITA57.1相应的约束IO,您可以参考以下UG页面#56http://www.xilinx.com/support/documentation/boards_and_kits/kc705/ug810_KC705_Eval_Bd.pdf此外您还可以参考
附录CMaster约束文件列表-Shreyas -------------------------------------------------- --------------------------------------------尝试搜索你的答案 在发布新帖子之前在论坛或xilinx用户指南中发出问题。请注意 - 如果提供的信息解决了您的问题,请将答案标记为“接受为解决方案”。给予您认为有用的帖子给予荣誉(右边提供的星号) 并回复.---------------------------------------------- ------------------------------------------------ 以上来自于谷歌翻译 以下为原文 Hello, Both FMC connectors are of standard VITA57.1 to constraint IO accordingly, you can refer to following UG page #56 http://www.xilinx.com/support/documentation/boards_and_kits/kc705/ug810_KC705_Eval_Bd.pdf Also along with this you can refer to Appendix C Master Constraints File Listing -Shreyas---------------------------------------------------------------------------------------------- Try to search answer for your issue in forums or xilinx user guides before you post a new thread. Kindly note- Please mark the Answer as "Accept as solution" if information provided solves your query. Give Kudos (star provided in right) to a post which you think is helpful and reply oriented. ---------------------------------------------------------------------------------------------- |
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@ sameer.al-obaidihow可以将KC705 I / O定义为FMC 150端口,可以与4DSP子卡兼容,因此可以用于在Vivado 2015.4.2中发送和接收数据。
正如上面提到的Shreyas,您需要在xdc文件中设置约束。 对于例如 让我们说你有“输入”& RTL中的“输出”信号名称,您想要映射到B25和B25的引脚。 针脚G29,您的约束将如下所示 set_property PACKAGE_PIN B25 [get_ports输入] set_property IOSTANDARD LVCMOS25 [get_ports输入] set_property PACKAGE_PIN G29 [get_ports输出] set_property IOSTANDARD LVCMOS25 [get_ports输出] 上面的IOSTANDARD是2.5V。 如果您使用其他电压或其他IO标准,则需要相应更改。 请了解有关如何在Vivado中使用子卡配置FMC 150 I / O的信息。 在UG810的Appenedix C中,检查FMC约束部分 -------------------------------------------------- -------------------------------------------------- ----------------没有一个愚蠢的问题。 随意问,但快速搜索,以确保它还没有得到解答。 保持对话,获得Kudos和Accept Solution。 -------------------------------------------------- -------------------------------------------------- ------------------- 以上来自于谷歌翻译 以下为原文 @sameer.al-obaidi how can define the KC705 I/O to FMC 150 port that can be compatible with 4DSP daughter card so can be used to send and receive data in Vivado 2015.4.2. As Shreyas mentioned above, you need to set the constraints in xdc file. For e.g. lets say you have "Input" & "Output" signal names in your RTL and you want to map to Pin B25 & Pin G29, your constraint will look like below set_property PACKAGE_PIN B25 [get_ports Input] set_property IOSTANDARD LVCMOS25 [get_ports Input] set_property PACKAGE_PIN G29 [get_ports Output] set_property IOSTANDARD LVCMOS25 [get_ports Output] IOSTANDARD for above is 2.5V. if you using other voltages or other IO Standards, you need to change it accordingly. Please do have information about how can configure the FMC 150 I/O with daughter card in Vivado. In Appenedix C of UG810, check for section FMC constraints -------------------------------------------------------------------------------------------------------------------- There's no such thing as a stupid question. Feel free to ask but do a quick search to make sure it ain't already answered. Keep conversing, give Kudos and Accept Solution when you get one. ----------------------------------------------------------------------------------------------------------------------- |
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@ sameer.al-obaidi你能让它上班吗?
如果是,请通过将最有用的帖子标记为“接受为解决方案”来关闭此主题。 这将有益于其他用户。 如果没有,您面临的问题是什么? -------------------------------------------------- -------------------------------------------------- ----------------没有一个愚蠢的问题。 随意问,但快速搜索,以确保它还没有得到解答。 保持对话,获得Kudos和Accept Solution。 -------------------------------------------------- -------------------------------------------------- ------------------- 以上来自于谷歌翻译 以下为原文 @sameer.al-obaidi Were you able to get it to work? If yes, please close this thread by marking the post that was most helpful as "Accept as Solution". This will benefit other users. If not, what are the issues you facing? -------------------------------------------------------------------------------------------------------------------- There's no such thing as a stupid question. Feel free to ask but do a quick search to make sure it ain't already answered. Keep conversing, give Kudos and Accept Solution when you get one. ----------------------------------------------------------------------------------------------------------------------- |
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