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有没有一个例子如何将MCP2510芯片与FPGA接口？
以上来自于百度翻译 以下为原文 Is there any example how to interface a MCP2510 chip to FPGA? 
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18个回答
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嗨，这是你开始的新设计吗？MCP2510是一种非常古老的CAN控制器…不推荐用于新的设计：HTTP://www. MigCHIP.COM/WWWORDSTMS/En/MCP2510IT被MCP2515取代。但是，即使是MCP2515也不是那么新；（=）最近MCP25625被引入作为MCP2515的追随者。
以上来自于百度翻译 以下为原文 Hi, Is this a new design you start ? MCP2510 is a very old CAN controller...not recommended for new design : http://www.microchip.com/wwwproducts/en/MCP2510 It was replaced by MCP2515. But even MCP2515 is not so new ;=) Recently MCP25625 was introduced as a follower of MCP2515. Regards |
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我们使用的是MCP25625。任何例子都是好的，它对MCP2515或MCP25625没有关系。康熙会是一样的。
以上来自于百度翻译 以下为原文 We are using MCP25625. Any example will be good it doesn't matter for MCP2515 or MCP25625. The consept will be the same. |
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你需要定义“接口”是什么意思？数据协议（SPI）已经很好地建立和理解。物理接口将取决于所选择的FPGA支持的I/O标准。如果您正在为FPGA请求SPI IP，那么有很多内容，请参阅FPGA供应商App Notes等。如果您要求软件在SoC FPG上运行。一个或软核处理器在FPGA，然后，还有很多可以做，看看FPGA供应商的应用笔记等。如果你以前从未使用过FPGA，那么这是错误的论坛为您。
以上来自于百度翻译 以下为原文 You need to define what you mean by "interfacing"? The data protocol (SPI) is well established and well understood. Physical interfacing will depend on the I/O standards supported by the chosen FPGA. If you are asking for SPI IP for the FPGA, there's plenty around, see the FPGA vendors app notes, etc. If you are asking for software to run on a SoC-FPGA or soft core processor in the FPGA then, again, there's plenty that will do, see the FPGA vendors app notes, etc. If you have never used an FPGA before then this is the wrong forum for you. |
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我有一个工作SPI模块。我需要一个用户逻辑之上。接口-我们在C代码中做什么，只有在VHDL中。
以上来自于百度翻译 以下为原文 I have a working SPI module. I need a user logic above it. Interface - what do we do in C code, only in VHDL. |
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还有？用户逻辑需要做什么？它连接什么？这不是关于接口2510。
以上来自于百度翻译 以下为原文 And? What does the user logic need to do? What does it connect to? This is not about interfacing the 2510. |
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http://下载。你认为控制器是做什么的？因此，我不需要控制器来放置FPGA。如果你没有什么要说的话，请不要玩傻事。
以上来自于百度翻译 以下为原文 http://download.mikroe.co...elp/canspi_library.htm Do you see this picture? What do you think the controller does? So instead of controller I whant to put FPGA. Please don't play stupid if you have nothing constractive to say. |
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我要求什么不明显？ISMCP25独自飞来飞去？还是连接到主机上？连接到主机？那会是什么呢？嗯…同时猜测-微控制器、CPLD或FPGA。在FPGA的情况下，我们编写程序在VHDL或Verilog -所以我需要它！！！！
以上来自于百度翻译 以下为原文 What isn't obvious in my request? Is MCP25-WHATEVER flying around all by itself? Or is it connected to a host? Connected to a host? So what could it be? Mmmmm... whild guess - microcontroller, CPLD or FPGA. In case of FPGA - we write a program in VHDL or Verilog - so I need it!!! |
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如果你需要帮助，不要开始叫别人愚蠢。你告诉我们你有一个工作的SPI模块（在FPGA中暗示），并希望用户逻辑能够超越它。在任何人可以帮助你之前，你需要更多地说明你想要的用户逻辑。我们甚至不知道哪个FPGA供应商参与或你的FPGA SPI模块如何接口（WiSeBoin，Avalon，AXI，无论Xilinx使用这些天，或…？）如果你说你想在FPGA中为SPI模块提供RTL，那么你可以通过响应POST 4中的点来帮助自己。你在和哪些人打交道？
以上来自于百度翻译 以下为原文 Don't start calling people stupid if you want help. You told us you had a working SPI module (by implication in the FPGA) and want the user logic to go above it. You need to say a lot more about what you want that user logic to do before anyone can help you. We don't even know which FPGA vendor is involved or how your FPGA SPI module is interfaced (Wishbone, Avalon, AXI, whatever Xilinx use these days, or ...?) If you reall mean you want the RTL for the SPI module in the FPGA then you could help yourself by responding to the points in post #4. Which ones are you struggling with? |
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你可能不需要一个CAN控制器为您的FPGA。你的FPGA制造商应该有可以直接连接到CAN收发器的IP，有很多不同的接口在CAN上运行，许多接口是封闭的和专有的。你需要弄清楚你需要哪一个。可以使用IPS或开放Verilog /VHDL代码来处理这些问题。在Microchip论坛上，您不太可能找到Verilog／VHDL代码。
以上来自于百度翻译 以下为原文 You probably don't need a CAN controller for your FPGA. Your FPGA manufacturer should have CAN IP which interfaces directly to a CAN transceiver. There are gazillions of different interfaces which run over CAN, many closed and proprietary. You need to figure out which one you need. There could be IPs or open Verilog/VHDL code to handle these. You're not very likely to find Verilog/VHDL code on Microchip forums. |
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1。我懂了。其实我确实需要CAN控制器——MCP25625。客户端使用它，我们应该与FPGA接口。我们有4-6个模块以高速率发送数据包，这就是为什么我们需要FPGA。2。供应商提供FPGA并不重要——VHDL代码将是相同的。更清楚的是，这是一个C代码如何读取接收缓冲区：我需要它在VHDL/Verilog中。没有供应商或任何其他条件。在我的请求中没有什么异常。我曾在模拟芯片、Maxm、TI等多个芯片上工作，提供了VHDL代码来连接芯片。毕竟公司有兴趣出售自己的产品。更好的技术支持更好的销售……我想。我不确定我推荐这种特殊芯片给我们的客户。
以上来自于百度翻译 以下为原文 1. I see. Actually I do need CAN controller - MCP25625. The client use it and we should interface it with FPGA. We have 4-6 modules sending packets at high rate - this is why we need FPGA. 2. It doesn't matter what vendor provides FPGA - the VHDL code will be the same. To be more clear - this is a C code how to read received buffer: int mcp25625_msg_read(RXB_t rx_buffer, uint8_t *msg, uint8_t *count, uint32_t *ID, bool *IDE, bool *RTR) { if( mcp25625_hw_data_get( rx_buffer, &transfer ) ) return MCP25625_RX_ERR; if( ( *IDE = transfer.id.sidl.ide ) ) { *RTR = transfer.payload.dlc.rtr; unpack_eid( &transfer.id, ID ); } else { *RTR = transfer.id.sidl.srr; unpack_sid( &transfer.id, ID ); } *count = transfer.payload.dlc.len; memcpy( ( void* )msg, ( void* )transfer.payload.buff, 8 ); ie_ctl.rx0 = false; ie_ctl.rx1 = false; ie_ctl.mask = CAN_RX0IE | CAN_RX1IE; ie_ctl.reg = INT_FLG; if( mcp25625_hw_ctl_update( ( void* )&ie_ctl ) ) return MCP25625_CTL_ERR; return MCP25625_OK; } I need it in VHDL/Verilog. No vendor or any other condition involved. Nothing unusual in my request. I've worked in many chips from Analog Device, Maxim, TI, etc. that provided VHDL code for interfacing their chips. After all the company interest to sell its product. The better tech. support the better sell... I think. I'm not sure I recommend this particular chip for future disigns to our customers. |
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2019-5-9 15:14:03
评论
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如果你想得到最好的结果，FPGA供应商是很重要的。至少有两个用于高级合成的工具，它们将采用C代码并将其转换成RTL，具有不同程度的成功。我不一定建议你的案例中的C代码有很多函数调用。这些功能也将需要实现。我想你会发现他们在C代码设计的任何硬件上都与SPI大师接口。更多硬件？谁写的？什么是产生从CAN消耗数据？同样，FPGA供应商最有可能拥有一个SPI主机，您可以使用它来与CAN控制器进行接口。你的问题在哪里？你的“用户逻辑”可以和RTL写的状态机一样简单，但是当你不愿意帮助自己的时候，很难帮助你，例如，给出更多你最终想要达到的细节。
以上来自于百度翻译 以下为原文 The FPGA vendor does matter if you want to get the best result. At least two have tools for high level synthesis that will take C code and turn it in to RTL with varying degrees of success. I wouldn't necessarily recommend that route in your case The C code has a number of function calls. Those functions will also need to be implemented. I think you will find they interface to the SPI master in whatever hardware the C code is designed for. And what's calling the C function that you listed? More hardware? Who's writing that? What is generating consuming the data from CAN? Again, the FPGA vendor will most likely have an SPI master that you can use to interface to your CAN controller. Where's your problem with that? Your "user logic" could be as simple as a state machine written in RTL but it's difficult to help when you are so unwilling to help yourself, e.g., by giving more details of what you are ultimately trying to achieve. |
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FPGA的IP通常是博世，还是其他第三方供应商，需要得到许可。使用单独的控制器的优点是它可以在没有额外成本的情况下获得许可。
以上来自于百度翻译 以下为原文 CAN IP for FPGA is generally Bosch, or some other 3rd party vendor, and needs to be licensed. The advantage of using a separate controller is that it comes ready licensed at no extra cost. |
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你在开玩笑吧？CAN是慢的，通常是250kHz，很少是500 kHz，并且工作正常，总线通常未被充分利用。一个内置的CAN模块的PIC完全能够接收所有可能发送的CAN消息。我想这就是MCP25625是一个被编程来翻译成SPI的PIC。用FPGA来对付蚊子就像杀掉一只佳能的蚊子。
以上来自于百度翻译 以下为原文 You're kidding, right? CAN is slow, usually 250kHz, rarely 500kHz, and to work well the bus is usually underutilized. A PIC with a built-in CAN module is perfectly capable of receiving all the CAN messages that can possibly be sent. I guess that's what MCP25625 is - a PIC which is programmed to translate CAN to SPI. Using FPGA for that is like killing mosquitos with a canon. |
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我有那种感觉，也会评论同样的话。
以上来自于百度翻译 以下为原文 I had that feeling and was going to comment the same |
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我懂了。谢谢您。我会在这个项目上投入更多的考虑。
以上来自于百度翻译 以下为原文 I see. Thank you. I'll invest more considerations in the project. |
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