FX3同步从设备FIFO读取时增加2个字

不，我有FX3 DVK板连接到我们的 FPGA板，并尝试设置同步奴隶FIFO连接。如果我从主机发送数据到OUTEP，FX3在发送的数据之前提供2个附加字。如何正确设置FX3以避免这种情况？我用这种方式设置端点和套接字：
定义了CyfxxEpPix0x06/*EP 6 out */y定义CyfxfxEppEuff0x82/*EP 2在*/y定义CyfxxEppEuthuleSubbSocket 0x06/*USB套接字6是生产者*/y*定义CyfxxEppEuffeleSubbSocket 0x02/*USB插口2是FX3硅上使用的消费*//*。*/y*定义CyfxxEpPultSerixPtPosiSocket CyuU3pPiBiSocktO0/*P-端口套接字0是生产者*/y*定义CyfxxEpEpCuffelpPotoSocket Cyu3UpPiBiSockIt1/*P-端口套接字1是消费者*/
并设置GPIF II来连接固定到线程的标志：
{CyuU3PiPiBGPFIFCCTRLYBUSEPLUNTTY地址（4），0x00 000 011}，// FLAGA =固定到线程1 {CyuU3PYPIPGPIFCCTLLYBUSEPLUNTTY地址（5），0x000 000 10}，//Frabb＝固定到线程0
这很好，但是在FIFO中有2个周期，有0x000数据。我必须使用带有水印值的部分标志吗？是的，如何配置？
附件中您可以找到这个BEHA的芯片显示器输出
FX3RAD.PNG
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以下为原文
No I have the FX3 DVK board connected to our FPGA board and try to set up the sync slave FIFO conne tion. If I send data from host to the OUT EP, the FX3 delivers 2 additional words before the transmitted data. How can I setup the FX3 correctly to avoid this? I set up the endpoints and sockets in this way:

#define CY_FX_EP_PRODUCER 0x06 /* EP 6 OUT */
#define CY_FX_EP_CONSUMER 0x82 /* EP 2 IN */

#define CY_FX_EP_PRODUCER_USB_SOCKET 0x06 /* USB Socket 6 is producer */
#define CY_FX_EP_CONSUMER_USB_SOCKET 0x02 /* USB Socket 2 is consumer */

/* Used on FX3 silicon. */
#define CY_FX_EP_PRODUCER_PPORT_SOCKET CY_U3P_PIB_SOCKET_0 /* P-port Socket 0 is producer */
#define CY_FX_EP_CONSUMER_PPORT_SOCKET CY_U3P_PIB_SOCKET_1 /* P-port Socket 1 is consumer */
And set up the GPIF II to connect the flags fixed to the threads:

{CY_U3P_PIB_GPIF_CTRL_BUS_SELECT_ADDRESS(4) , 0x00000011}, //FLAGA = Fixed to Thread 1
{CY_U3P_PIB_GPIF_CTRL_BUS_SELECT_ADDRESS(5) , 0x00000010}, //FLAGB = Fixed to Thread 0

This works well, but there are 2 cycles with 0x0000 data in the FIFO. Do I have to use the partial flags with watermark value? Is yes, how to configure?
Attached you can find the ChipScope output for this beha

• FX3_Read.PNG18.3 K