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我一直在arb中生成一个简单的方形+直流信号。
模式。 从示波器和由SYNC信号触发的锁定中可以看出，结果信号似乎在两个相位之间不稳定地移动（结果，锁定被周期性地解锁）。 特定频率（如2.0,1.6,1.0 ...... MHz）不会发生这种情况。 显然，无论arb中的点数多少。 信号。 回到内置函数，我没有遇到这个问题。 它可以在另一个33120上重现。 以上来自于谷歌翻译 以下为原文 I have been generating a simple square + dc signal in arb. mode. As seen both from an oscilloscope and a lock-in triggered by the SYNC signal, the resulting signal seems to move erratically between two phases (as a result, the lock-in is periodically unlocked). This does not happen for specific frequencies (like 2.0, 1.6, 1.0 ... MHz). Apparently, no matter the number of points in the arb. signal. Going back to the built-in functions, I do not encounter this problem. It is reproducible on another 33120. 
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如果不深入研究您的应用和波形，这很可能是33120A成为DDS发生器的结果。
DDS对波形进行采样，不会每个点都输出，因此您将不时地在波形上看到+/-一个时钟周期。 以下是用户手册中的一节，我认为描述了您所看到的内容：在频域中可见的另一种类型的波形错误是相位截断错误。 该错误是由输出波形的时间量化引起的。 每当波形被有限数量的水平点（长度）描述时，它就会被及时采样（或量化），从而导致相位截断误差。 相位截断引起的杂散信号会在输出波形中引入抖动。 这可以被视为输出零交叉的时间（和相位）位移。相位截断导致输出信号的相位调制，这导致寄生谐波（参见下面的等式）。 对于较低的输出频率，相位累加器周期性地不提前RAMaddresses，导致DAC提供与前一个时钟周期记录的电压相同的电压。 因此，在继续向前推进之前，阶段“滑回”360 /点。 当RAM地址增量在输出的每个周期相同时，相位截断误差（和抖动）基本上为零。 33120A中的所有标准波形均产生至少16,000个波形点，从而产生低于DAC宽带本底噪声的激励信号。相位截断谐波-20 x log10（P）dBc其中“P”是RAM中波形点的数量 。 以上来自于谷歌翻译 以下为原文 Without digging to deeply into your application and waveform this is most likely a result of the 33120A being DDS generator. DDS samples the waveform, it does not output every point necessarily, so you are going to see +/- a clock cycle on your waveforms from time to time. Here is a section from the user's manual that I think describes what you are seeing: Another type of waveform error visible in the frequency domain is phase truncation error. This error results from time quantization of the output waveform. Whenever a waveshape is described by a finite number of horizontal points (length), it has been sampled in time (or quantized) causing a phase truncation error. Spurious signals caused by phase truncation introduce jitter into the output waveform. This may be regarded as time (and phase) displacement of output zero crossings. Phase truncation causes phase modulation of the output signal which results in spurious harmonics (see the equation below). For lower output frequencies, the phase accumulator periodically does not advance RAM addresses, causing the DAC to deliver the same voltage as recorded on the previous clock cycle. Therefore, the phase “slips” back by 360 / points before continuing to move forward again. When RAM address increments are the same on each cycle of the output, phase truncation error (and jitter) are essentially zero. All standard waveshapes in the 33120A are generated with at least 16,000 waveform points which results in spurious signals below the wide-band noise floor of the DAC. Phase Truncation Harmonics –20 x log10 (P) dBc where “P” is the number of waveform points in RAM. |
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最新的功能/任意波形发生器33521A和33522A使用与DDS不同的技术，每次输出的每个点都与DDS不同。
以上来自于谷歌翻译 以下为原文 FYI Our newer Function/Arbitrary waveform generators the 33521A and 33522A, use a different technology than DDS and every point in every waveform is output everytime unlike DDS. |
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感谢你的回答。
但我不确定手册的这一部分是否真正完整地描述了问题。 我从这一节中理解的是，信号的产生可能导致两个连续波的不匹配，从而产生相位的周期性移位。重点是这些移位不应该不稳定，即如果你在SYNC上锁定示波器 ，对于信号的每个周期，你应该能够以可重复的方式观察到这种不匹配，但信号不应该在时间尺度上不稳定地移动。 此外，如文档中所述，向信号添加点应该最小化这种影响，而在我的情况下没有观察到这种情况。 以上来自于谷歌翻译 以下为原文 thanks for the answer. I am however not sure this part of the manual actually fully describes the problem. What I understand from this section is that the generation of the signal may cause a mismatch of two contiguous waves, thus creating periodic shifts of the phase. The point is that these shifts should not be erratic, i.e. if you lock an oscilloscope on the SYNC, you should be able to observe this mismatch in a reproducible way, for each period of the signal, but the signal should not erraticaly shift on the time scale. Moreover, adding points to the signal should minimize this effect, as described in the doc., while this is not observed in my case. |
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safgafa 发表于 2019-6-27 16:12 我知道这已经有一段时间了，但我刚刚在同事的一条旧回复消息中遇到了这个案例的解决方案。 另一位客户带着类似的问题来找我，我记得以前我见过这个问题。 你在这个33120A中看到的问题被称为相位蠕变，并且有一个修复。 如果你有7.0或更高版本，你可以使用未记录的“修复”只需发送以下命令：DIAG：POKE 16,0，A 1将启用“修复”，0将禁用它。 出厂默认值为0以保持最大的兼容性，并且我们也不会在没有他们知道我们正在做的情况下扭曲任何人的波形。 此修复程序的作用是通过在您定义的点之间插入（不重复）点将波形扩展到16K点。 注意到这个“修复”的唯一一次是当你用你创建的任意波形打开爆发时。 因此，要打开修复程序，您将发送DIAG：POKE 16,0,1 以上来自于谷歌翻译 以下为原文 I know it's been awhile, but I just came across a solution to this case in an old answered message from a colleague. Another customer came to me with a similar issue, and I remembered I had seen this question before. The issue you are seeing in this 33120A is known as phase creep, and there is a fix. If you have revision 7.0 or later, you can use the undocumented "fix" Just send the command below: DIAG:POKE 16,0, A 1 will enable the "fix" and a 0 will disable it. The factory default is 0 to maintain maximum compatability, and also so that we do NOT distort a anyone's waveform without them knowing we are doing it. What this fix does is expand the waveform out to 16K points by interpolating (not repeating) points between those that you have defined. The only time this "fix" is noticed is when you turn on the burst with an arbitrary waveform you created. So to turn on the fix, you would send DIAG:POKE 16,0,1 |
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4864165sas 发表于 2019-6-27 16:24 嗨lhornburg，感谢无证的“修复”命令。 但是，我发现修复程序存在另一个问题。 固定后，输出幅度不大：当我尝试输出7.8V信号时，我从示波器读取的实际输出为7.2V。 那是我有2k任意点的时候。 对于完整的16k点，输出电压甚至更低。 恢复到unfix状态可以解决问题，同时不会解决相位蠕变问题。 以上来自于谷歌翻译 以下为原文 Hi lhornburg , thanks for the undocumented "fix" command. However, I found another problem with the fix. After fixing, the output amplitude is erroreous: when I try to output a 7.8V signal, the actual output I read from oscilloscope is 7.2V. That's when I have 2k arbitrary points. For full 16k points, the output voltage is even lower. Reverting to the unfix state solves the problem, while leaving the phase creep problem unsolved. |
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