无法找出IO引脚的状态

当没有 电源给该组时，我无法找出IO引脚的状态。
Spartan 6 Selec tiO用户指南告诉我以下内容
VCCINT（1.2V），VCCAUX和VCCO电源可以按任何顺序应用。
在 FPGA启动配置过程之前，VCCINT，VCCO Bank 2和VCCAUX必须达到数据表中指示的各自最低建议操作电平。
此时，所有输出驱动器都处于高阻态。
VCCO Bank 2，VCCINT和VCCAUX用作内部上电复位（POR） 电路的输入。
这是否也适用于无动力的IO银行？
我需要知道的原因与我们系统的启动程序有关。
微控制器和BANK0从总线接收电源。
然后，微控制器启用主电源，VCCINT和VCCAUX以及其他IO bank电源电压施加到FPGA。
微控制器和BANK0现在也从主电源接收电源。电路板上的一些器件与微控制器同时启动，如时钟发生器和一些收发器。
时钟发生器还用于为FPGA生成时钟信号。
我需要知道无源FPGA引脚对时钟信号的影响。
亲切的问候，
罗伯特



以下为原文

I am having trouble finding out what the state of an IO pin is when no power is applied to that bank. The Spartan 6 SelectIO user guide tells me the following

The VCCINT (1.2V), VCCAUX, and VCCO supplies can be applied in any order. Before the FPGA starts the configuration process, VCCINT, VCCO Bank 2 and VCCAUX must have reached their respective minimum recommended operating levels indicated in the datasheet.At this time, all output drivers are in a high-impedance state.VCCO Bank 2, VCCINT,
and VCCAUX serve as inputs to the internal power-on reset (POR) circuit.

Does this also apply to unpowered IO banks?

The reason I need to know has to do with the startup procedure of our system. A microcontroller and BANK0 receive power from a bus. The microcontroller then enables the main power supply and the VCCINT and VCCAUX and the other IO bank supply voltages are applied to the FPGA. The microcontroller and BANK0 now also receive their power from the main supply source.A couple of devices on the board startup simultaneous with the microcontroller like clockgenerators and some transceivers. The clockgenerator is also used for generating clock signals to the FPGA. I need to know what effect the unpowered FPGA pins have on the clocksignals.

With kind regards,

Robert