嗨,
我在我的项目中使用Spartan-3AN(XC3S400AN)。
我希望能够在现场配置
FPGA。
因此,我向FSM添加了几种状态,负责从/向系统内闪存(ISF)读取/写入(我在ISF中也有一些用户数据)。
为了确保始终可以正确配置FPGA,新配置映像应写在ISF的另一个指定区域,当前工作映像不是。
例如,在XC3S400AN中,有两个区域可用于FPGA图像;
一个从地址开始:0x00_0000,另一个从地址开始:0x08_0000(ug333.pdf,第23页,假设默认寻址模式)。
如果正常工作的当前FPGA配置映像位于地址:0x08_0000,则新映像应写入地址:0x00_0000。
因为FPGA应该处理所有配置错误,因为没有更高的监督,所以在开始通过ICAP配置FPGA之前,需要知道配置映像是否存在任何问题。
因此,有一个模块在接收和写入新图像到ISF期间计算CRC-16。
如果结果与位文件CRC相同,则ICAP被触发,否则不会发生任何事情。
类似于xapp468.pdf的东西:“失败安全的Mul
tiBoot参考设计”,但没有使用picoblaze。
为此,我需要知道Spartan-3AN的确切位文件格式。
具体来说,
在位文件的开头,应该忽略哪些字节?
从哪个字节,我应该开始计算CRC?
CRC的位置在哪里?
我找到了一个文档,它在Spartan-3上指定了一些这方面的信息:xapp452.pdf“Spartan-3 FPGA系列高级配置架构”(第11页),但它与我所拥有的位文件的不同之处在于:
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F - 字节编号
00 09 0F F0 0F F0 0F F0 0F F0 00 00 01 61 00 36
69 73 66 5F 6D 65 6D 5F 74 6F 70 5F 76 32 2E 6E
63 64 3B 48 57 5F 54 49 4D 45 4F 55 54 3D 46 41
4C 53 45 3B 55 73 65 72 49 44 3D 30 78 46 46 46
46 46 46 46 46 00 62 00 0E 33 73 37 30 30 61 6E
66 67 67 34 38 34 00 63 00 0B 32 30 31 33 2F 30
39 2F 31 32 00 64 00 09 31 38 3A 30 33 3A 30 38
00 65 00 05 36 4C FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF AA 99 30 A1 00 07 20 00 31 61 - 同步字
09 EE 33 21 3C 0F 31 A1 00 C9 31 41 2F 00 31 C2
这也与xapp468文档中picoblaze .psm代码中搜索的模式不同(我对picoblaze不太熟悉,但我可以看到在这段代码中我们正在寻找0xFF然后同步字然后是0x31,0x61和0x80
你可以看到它与我的不同。
如果您能提供有关Spartan-3AN位文件格式的详细信息,并且我需要修改它的某些部分,以便能够以我之前指定的方式将配置文件写入ISF,我将不胜感激。
。
谢谢,
Nazila
以上来自于谷歌翻译
以下为原文
Hi,
I am using Spartan-3AN (XC3S400AN) in my project. I would like to be able to configure the FPGA in field. So I added several states to an FSM which responsible for reading/writing from/to the In-System Flash memory (ISF) (I also have some user data in the ISF). To be sure that the FPGA can always be configured properly, the new configuration image should be written on the other designated region of the ISF which the current working image is not. For instance, in XC3S400AN, there are two regions that can be used for FPGA images; one starts at address: 0x00_0000 and the other one starts at address: 0x08_0000 (ug333.pdf, page 23 and assuming default addressing mode).
If the current FPGA configuration image, which is properly working, is located at address: 0x08_0000 then the new image should be written in address: 0x00_0000.
Since, the FPGA should handle all configuration errors, ect because there is no higher supervision, it is desired to know if there is any issues with the configuration image before start configuring the FPGA through ICAP. So there is a module which is calculating CRC-16 during the time of receiving and writing the new image to ISF. If the result was the same with the bit file CRC then the ICAP is being triggered otherwise nothing will happen. Something similar to the xapp468.pdf: "Fail-Safe MultiBoot Reference Design" but without using picoblaze.
To do this, I need to know the exact bit file format for Spartan-3AN. In specific,
- At the begining of the bit file, which bytes should be ignored?
- From which byte, I should start calculating the CRC?
- Where the CRC is located?
I found a document which is specifying some of this information on Spartan-3: xapp452.pdf "Spartan-3 FPGA Family Advanced Configuration Architecture" (page 11) but it is different from the bit file that I have which starts as:
00 01 02 03 04 05 06 07 08 09 0A 0B 0C 0D 0E 0F -- byte number
00 09 0F F0 0F F0 0F F0 0F F0 00 00 01 61 00 36
69 73 66 5F 6D 65 6D 5F 74 6F 70 5F 76 32 2E 6E
63 64 3B 48 57 5F 54 49 4D 45 4F 55 54 3D 46 41
4C 53 45 3B 55 73 65 72 49 44 3D 30 78 46 46 46
46 46 46 46 46 00 62 00 0E 33 73 37 30 30 61 6E
66 67 67 34 38 34 00 63 00 0B 32 30 31 33 2F 30
39 2F 31 32 00 64 00 09 31 38 3A 30 33 3A 30 38
00 65 00 05 36 4C FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF
AA 9930 A1 00 07 20 00 31 61
-- synch word
09 EE 33 21 3C 0F 31 A1 00 C9 31 41 2F 00 31 C2
This is also different from the pattern being searched for in the picoblaze .psm code in xapp468 document (I am not very familiar with picoblaze but I can see that in this code we are looking for the 0xFF then synch word then 0x31, 0x61 and 0x80. As you can see it is different from what I have.
I would appreciate it if you could provide me the details on the Spartan-3AN bit file format and if I need to modify some parts of it in order to make it possible for the configuration files to be written in ISF in the manner I specified earlier.
Thank you,
Nazila
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