1
完善资料让更多小伙伴认识你,还能领取20积分哦, 立即完善>
扫一扫,分享给好友
下载GEL文件失败,出现错误如下:
C66xx_0: GELOutput: Setup_Memory_Map... C66xx_0: GELOutput: Setup_Memory_Map... Done. C66xx_0: GELOutput: ConnectingTarget... C66xx_0: GELOutput: DSP core #0 C66xx_0: GELOutput: C6678L GEL file Ver is 2.005 C66xx_0: GELOutput: Global Default Setup... C66xx_0: GELOutput: Setup Cache... C66xx_0: GELOutput: L1P = 32K C66xx_0: GELOutput: L1D = 32K C66xx_0: GELOutput: L2 = ALL SRAM C66xx_0: GELOutput: Setup Cache... Done. C66xx_0: GELOutput: Main PLL (PLL1) Setup ... C66xx_0: GELOutput: PLL in Bypass ... C66xx_0: GELOutput: PLL1 Setup for DSP @ 1000.0 MHz. C66xx_0: GELOutput: SYSCLK2 = 333.3333MHz, SYSCLK5 = 200.0 MHz. C66xx_0: GELOutput: SYSCLK8 = 15.625 MHz. C66xx_0: GELOutput: PLL1 Setup... Done. C66xx_0: GELOutput: Power on all PSC modules and DSP domains... C66xx_0: GELOutput: Security Accelerator disabled! C66xx_0: GELOutput: Power on all PSC modules and DSP domains... Done. C66xx_0: GELOutput: PA PLL (PLL3) Setup ... C66xx_0: GELOutput: PA PLL Setup... Done. C66xx_0: GELOutput: DDR3 PLL (PLL2) Setup ... C66xx_0: GELOutput: DDR3 PLL Setup... Done. C66xx_0: GELOutput: DDR begin (1333 auto) C66xx_0: GELOutput: XMC Setup ... Done C66xx_0: GELOutput: DDR3initialization is complete. C66xx_0: GELOutput: DDR done C66xx_0: GELOutput: DDR3 memory test... Started C66xx_0: GELOutput: DDR3 memory test... Failed C66xx_0: GELOutput: Main PLL (PLL1) Setup ... C66xx_0: GELOutput: PLL not in Bypass, Enable BYPASS in the PLL Controller... C66xx_0: GELOutput: PLL1 Setup for DSP @ 1000.0 MHz. C66xx_0: GELOutput: SYSCLK2 = 333.3333MHz, SYSCLK5 = 200.0 MHz. C66xx_0: GELOutput: SYSCLK8 = 15.625 MHz. C66xx_0: GELOutput: PLL1 Setup... Done. C66xx_0: GELOutput: PA PLL (PLL3) Setup ... C66xx_0: GELOutput: PA PLL Setup... Done. C66xx_0: GELOutput: DDR3 PLL (PLL2) Setup ... C66xx_0: GELOutput: DDR3 PLL Setup... Done. C66xx_0: GELOutput: DDR begin (1333 auto) C66xx_0: GELOutput: XMC Setup ... Done C66xx_0: GELOutput: DDR3 initializationis complete. C66xx_0: GELOutput: DDR done C66xx_0: GELOutput: DDR3 memory test... Started C66xx_0: GELOutput: DDR3 memory test... Failed C66xx_0: GELOutput: Main PLL (PLL1) Setup ... C66xx_0: GELOutput: PLL not in Bypass, Enable BYPASS in the PLL Controller... C66xx_0: GELOutput: PLL1 Setup for DSP @ 1000.0 MHz. C66xx_0: GELOutput: SYSCLK2 = 333.3333MHz, SYSCLK5 = 200.0 MHz. C66xx_0: GELOutput: SYSCLK8 = 15.625 MHz. C66xx_0: GELOutput: PLL1 Setup... Done. C66xx_0: GEL Output:PA PLL (PLL3) Setup ... C66xx_0: GELOutput: PA PLL Setup... Done. C66xx_0: GELOutput: DDR3 PLL (PLL2) Setup ... C66xx_0: GELOutput: DDR3 PLL Setup... Done. C66xx_0: GELOutput: DDR begin (1333 auto) C66xx_0: GELOutput: XMC Setup ... Done C66xx_0: GELOutput: DDR3initialization is complete. C66xx_0: GELOutput: DDR done C66xx_0: GELOutput: DDR3 memory test... Started C66xx_0: GELOutput: DDR3 memory test... Failed C66xx_0: GELOutput: Main PLL (PLL1) Setup ... C66xx_0: GELOutput: PLL not in Bypass, Enable BYPASS in the PLL Controller... C66xx_0: GELOutput: PLL1 Setup for DSP @ 1000.0 MHz. C66xx_0: GELOutput: SYSCLK2 = 333.3333MHz, SYSCLK5 = 200.0 MHz. C66xx_0: GELOutput: SYSCLK8 = 15.625 MHz. C66xx_0: GEL Output:PLL1 Setup... Done. C66xx_0: GELOutput: PA PLL (PLL3) Setup ... C66xx_0: GELOutput: PA PLL Setup... Done. C66xx_0: GELOutput: DDR3 PLL (PLL2) Setup ... C66xx_0: GELOutput: DDR3 PLL Setup... Done. C66xx_0: GELOutput: DDR begin (1333 auto) C66xx_0: GELOutput: XMC Setup ... Done C66xx_0: GELOutput: DDR3initialization is complete. C66xx_0: GELOutput: DDR done C66xx_0: GELOutput: DDR3 memory test... Started C66xx_0: GELOutput: DDR3 memory test... Failed C66xx_0: GELOutput: Main PLL (PLL1) Setup ... C66xx_0: GELOutput: PLL not in Bypass, Enable BYPASS in the PLL Controller... C66xx_0: GELOutput: PLL1 Setup for DSP @ 1000.0 MHz. C66xx_0: GELOutput: SYSCLK2 = 333.3333MHz, SYSCLK5 = 200.0 MHz. C66xx_0: GELOutput: SYSCLK8 = 15.625 MHz. C66xx_0: GELOutput: PLL1 Setup... Done. C66xx_0: GELOutput: PA PLL (PLL3) Setup ... C66xx_0: GELOutput: PA PLL Setup... Done. C66xx_0: GELOutput: DDR3 PLL (PLL2) Setup ... C66xx_0: GELOutput: DDR3 PLL Setup... Done. C66xx_0: GELOutput: DDR begin (1333 auto) C66xx_0: GELOutput: XMC Setup ... Done C66xx_0: GELOutput: DDR3initialization is complete. C66xx_0: GELOutput: DDR done C66xx_0: GELOutput: DDR3 memory test... Started C66xx_0: GELOutput: DDR3 memory test... Failed C66xx_0: GELOutput: Main PLL (PLL1) Setup ... C66xx_0: GELOutput: PLL not in Bypass, Enable BYPASS in the PLL Controller... C66xx_0: GELOutput: PLL1 Setup for DSP @ 1000.0 MHz. C66xx_0: GELOutput: SYSCLK2 = 333.3333MHz, SYSCLK5 = 200.0 MHz. C66xx_0: GELOutput: SYSCLK8 = 15.625 MHz. C66xx_0: GELOutput: PLL1 Setup... Done. C66xx_0: GELOutput: PA PLL (PLL3) Setup ... C66xx_0: GELOutput: PA PLL Setup... Done. C66xx_0: GELOutput: DDR3 PLL (PLL2) Setup ... C66xx_0: GELOutput: DDR3 PLL Setup... Done. C66xx_0: GELOutput: DDR begin (1333 auto) C66xx_0: GELOutput: XMC Setup ... Done C66xx_0: GELOutput: DDR3initialization is complete. C66xx_0: GELOutput: DDR done C66xx_0: GELOutput: DDR3 memory test... Started C66xx_0: GELOutput: DDR3 memory test... Failed C66xx_0: GELOutput: Main PLL (PLL1) Setup ... C66xx_0: GELOutput: PLL not in Bypass, Enable BYPASS in the PLL Controller... C66xx_0: GEL Output:PLL1 Setup for DSP @ 1000.0 MHz. C66xx_0: GELOutput: SYSCLK2 = 333.3333MHz, SYSCLK5 = 200.0 MHz. C66xx_0: GELOutput: SYSCLK8 = 15.625 MHz. C66xx_0: GELOutput: PLL1 Setup... Done. C66xx_0: GELOutput: PA PLL (PLL3) Setup ... C66xx_0:]C66xx_0:]C66xx_0: GEL: Errorwhile executing OnTargetConnect(): Target failed to write 0x02620338 at (*((unsigned int *)0x02620338)|=((temp<<24)&0xFF000000)) [evmc6678l.gel:226] at Init_Pll3(PLLM_PASS, PLLD_PASS)[evmc6678l.gel:870] atGlobal_Default_Setup_Silent() [evmc6678l.gel:577] at OnTargetConnect() . C66xx_0: GELOutput: Invalidate All Cache... C66xx_0: GEL: Error calling OnPreFileLoaded(): Target failed to write0x01845028 C66xx_0: TroubleReading Register ControlRegisters_CSR: (Error -1060 @ 0x41) Device is notresponding to the request. Reset the device, and retry the operation. If errorpersists, confirm configuration, power-cycle the board, and/or try morereliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.232.0) C66xx_0: TroubleReading Register ControlRegisters_DNUM: (Error -1060 @ 0x50) Device is notresponding to the request. Reset the device, and retry the operation. If errorpersists, confirm configuration, power-cycle the board, and/or try morereliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.232.0) C66xx_0: TroubleReading Register ControlRegisters_DNUM: (Error -1060 @ 0x50) Device is notresponding to the request. Reset the device, and retry the operation. If errorpersists, confirm configuration, power-cycle the board, and/or try morereliable JTAG settings (e.g. lower TCLK). (Emulation package 5.1.232.0) C66xx_0: AutoRun:Target not run as breakpoint could not be set: Error enabling this function:Claim hardware resource ownership failed. C66xx_0: Trouble Reading RegisterControlRegisters_CSR: (Error -1060 @ 0x41) Device is not responding to therequest. Reset the device, and retry the operation. If error persists, confirmconfiguration, power-cycle the board, and/or try more reliable JTAG settings(e.g. lower TCLK). (Emulation package 5.1.232.0) |
|
相关推荐
1 条评论
1个回答
|
|
是代码复制出现问题了吗,看着很乱
|
|
|
|
你正在撰写答案
如果你是对答案或其他答案精选点评或询问,请使用“评论”功能。
基于 DSP5509 进行数字图像处理中 Sobel 算子边缘检测的硬件连接电路图
3262 浏览 0 评论
796 浏览 0 评论
普中科技F28335开发板中,如何使用aic23播放由代码生成的正弦波
3695 浏览 0 评论
4454 浏览 1 评论
1376 浏览 1 评论
小黑屋| 手机版| Archiver| 德赢Vwin官网 ( 湘ICP备2023018690号 )
GMT+8, 2024-12-23 21:16 , Processed in 0.424307 second(s), Total 48, Slave 41 queries .
Powered by 德赢Vwin官网 网
© 2015 bbs.elecfans.com
关注我们的微信
下载发烧友APP
德赢Vwin官网 观察
版权所有 © 湖南华秋数字科技有限公司
德赢Vwin官网 (电路图) 湘公网安备 43011202000918 号 电信与信息服务业务经营许可证:合字B2-20210191 工商网监 湘ICP备2023018690号