Interfacing SDRAM Memory on High Performance Microcontrollers

2015-4-8 10:33:35 2517 SDRAM

0 `描述 This reference desing demonstrates how to implement and interface SDRAM Memory to the performance microcontroller TM4C129XNCZAD. The implementation is made possible by using the EPI Interface of the Microcontroller to interface a 256Mbit SDRAM at 60MHz which allows developers to implement additional memory for code and data when interfacing with High Speed LCD Panels. 特性 • Designed for (formerly Tiva MCU) DK-TM4C129X EVM with integrated Smart QVGA LCD Panel for Graphics Rendering http://www.ti.com.cn/tool/cn/TIDM-CONNECTED-ETHERNET • Extend the useable memory space to 512Mbit, 16-bit SDRAM with the 60MHz External Peripherial Interface (EPI) for high memory throughput and footprint applications • Driver library components to simplify code development • Source code contains projects for Code Composer Studio Interfacing SDRAM Memory on High Performance Microcontrollers Bill of Materials.pdf (87.72 KB, 下载次数: 2 ) Interfacing SDRAM Memory on High Performance Microcontrollers Design Guide.pdf (1.24 MB, 下载次数: 1 ) Interfacing SDRAM Memory on High Performance Microcontrollers Gerber.zip (22.54 KB, 下载次数: 1 ) Interfacing SDRAM Memory on High Performance Microcontrollers Schematic.pdf (259.4 KB, 下载次数: 1 ) ` 0
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