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直流电力线通信 (PLC) 参考设计

2015-5-6 11:14:35 3422

0 `描述 The DC (24 V, nominal) Power-Line Communication (PLC) reference design is intended as an evaluation module that customers can use to develop end-products for industrial applications leveraging the capability to deliver both power and communications overs the same DC power line. The reference design provides a complete design guide for the hardware and firmware design of a master (PLC) node, slave (PLC) node in an extremely small (approximately 1-inch diameter) industrial form factor. The application layer handles the addressing of the slave (PLC) nodes as well as the communication from the host processor (PC or Sitara ARM MPU from Texas Instruments). The host processor communicates only to the master (PLC) node via a USB-UART interface and then master node communicates to the rest of the slave nodes over the Power Line Communication. The easy-to-use GUI is also included that can run on the host processor and provides address management as well as slave node(s) status monitoring and control to the user. At the heart of this reference design are the AFE from TI, AFE031, to interface with power lines as well as the TMS320F28035 Piccolo™ Microcontroller that runs the PLC-Lite protocol from TI. The AFE’s monolithic integrated circuit provides high reliability in demanding power-line communications applications. The F2803x Piccolo family of microcontrollers (C2000™) provides the power of the C28x core and Control Law Accelerator (CLA) coupled with highly integrated control peripherals in low pin-count devices. Based on TI’s powerful, C2000 microcontroller architecture and the AFE031, developers can select the correct blend of processing capacity and peripherals to either add power-line communications to an existing design or implement a complete application with PLC communications. 特性 Robust protection against power-up surges with two-stage AC-coupling design with TVS protection Power design implements low-pass filtering to filter PLC communication from switching regulator operation Hardware and software supports multiple nodes DC-input voltage 18-V to 35-V operation Long cable support, (40-m) cable passed with no bit errors even at the lowest Transmitter Power Level Configurable hardware that supports different PLC standards Complete PHY, MAC, and applications layer slac633.zip (3.75 MB, 下载次数: 11 ) slac634.zip (1.07 MB, 下载次数: 9 ) slac635.zip (8.89 MB, 下载次数: 14 ) slac636.zip (1.59 MB, 下载次数: 10 ) slac637.zip (732.21 KB, 下载次数: 12 ) DC PLC Reference Design.pdf (2.16 MB, 下载次数: 34 ) DC PLC Reference Design Test Results.pdf (1.06 MB, 下载次数: 22 ) ` 1
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