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原工程是在xilinx sp-6芯片上的现在想在v-6的评估板上跑,所以我用PlanAhead来改了管脚约束,然后保存了。但是打开ucf一看发现管脚约束一点都没变,然后布线的时候也发生报错。求大神来指导怎么能成功用PlanAhead直接改ucf文件。。下面是ucf文件###########################################################时钟和复位接口
NET "ext_clk_25m" LOC = P23; NET "ext_clk_25m" IOSTANDARD = LVCMOS33; NET "ext_rst_n" LOC = H17; NET "ext_rst_n" IOSTANDARD = LVCMOS33; ########################################################## #LED指示灯接口 NET "led[0]" LOC=P17 | IOSTANDARD = LVCMOS33; NET "led[1]" LOC=P16 | IOSTANDARD = LVCMOS33; NET "led[2]" LOC=P15 | IOSTANDARD = LVCMOS33; NET "led[3]" LOC=P14 | IOSTANDARD = LVCMOS33; NET "led[4]" LOC=P12 | IOSTANDARD = LVCMOS33; NET "led[5]" LOC=P11 | IOSTANDARD = LVCMOS33; NET "led[6]" LOC=P10 | IOSTANDARD = LVCMOS33; NET "led[7]" LOC=P9 | IOSTANDARD = LVCMOS33; ########################################################## #拨码开关接口 NET "switch[0]" LOC=P29 | IOSTANDARD = LVCMOS33; NET "switch[0]" LOC = L20; NET "switch[1]" LOC=P30 | IOSTANDARD = LVCMOS33; NET "switch[1]" LOC = L21; NET "switch[2]" LOC=P32 | IOSTANDARD = LVCMOS33; NET "switch[2]" LOC = C22; NET "switch[3]" LOC=P33 | IOSTANDARD = LVCMOS33; NET "led[0]" LOC = AC22; NET "led[1]" LOC = AC24; NET "led[2]" LOC = AE22; NET "led[3]" LOC = AE23; NET "led[4]" LOC = AB23; NET "led[5]" LOC = AG23; NET "led[6]" LOC = AE24; NET "led[7]" LOC = AD24; NET "led[7]" IOSTANDARD = LVCMOS25; NET "ext_clk_100m" LOC = U23; NET "switch[3]" LOC = D22; NET "led[6]" IOSTANDARD = LVCMOS25; NET "led[5]" IOSTANDARD = LVCMOS25; NET "led[4]" IOSTANDARD = LVCMOS25; NET "led[3]" IOSTANDARD = LVCMOS25; NET "led[2]" IOSTANDARD = LVCMOS25; NET "led[1]" IOSTANDARD = LVCMOS25; NET "led[0]" IOSTANDARD = LVCMOS25; NET "switch[3]" IOSTANDARD = LVCMOS25; NET "switch[2]" IOSTANDARD = LVCMOS25; NET "switch[1]" IOSTANDARD = LVCMOS25; NET "switch[0]" IOSTANDARD = LVCMOS25; # PlanAhead Generated IO constraints NET "ext_clk_100m" IOSTANDARD = LVCMOS25; NET "ext_rst_n" IOSTANDARD = LVCMOS25; 我改了planahead发现下面多了几行是不是我直接吧以前的删掉就能用了 求解答
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时钟信号和复位信号是多出来的吗?
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