【OK210试用体验】3.1 裸机驱动的编写---UART篇 - 在线问答 - 电子技术论坛 - 最好最受欢迎电子论坛!

【OK210试用体验】3.1 裸机驱动的编写---UART篇

中科院 ( 楼主 )2015-9-18 17:19:02只看该作者倒序浏览
本帖最后由 中科院 于 2015-9-18 18:14 编辑


uart程序完成的功能是将你的发送的字符传回

  1. #define GPH2CON (*(volatile unsigned long *)0xE0200C40)
  2. #define GPH2DAT (*(volatile unsigned long *)0xE0200C44)
  3. #define GPD0CON (*(volatile unsigned long *)0xE02000A0)
  4. #define GPD0DAT (*(volatile unsigned long *)0xE02000A4)
  5. #define GPA0CON (*(volatile unsigned long *)0xE0200000)
  6. #define GPA1CON (*(volatile unsigned long *)0xE0200020)

  7. // clock

  8. #define APLL_LOCK (*(volatile unsigned long *)0xE0100000)
  9. #define MPLL_LOCK (*(volatile unsigned long *)0xE0100008)
  10. #define APLL_CON0 (*(volatile unsigned long *)0xE0100100)
  11. #define APLL_CON1 (*(volatile unsigned long *)0xE0100104)
  12. #define MPLL_CON (*(volatile unsigned long *)0xE0100108)
  13. #define CLK_SRC0 (*(volatile unsigned long *)0xE0100200)
  14. #define CLK_SRC1 (*(volatile unsigned long *)0xE0100204)
  15. #define CLK_SRC2 (*(volatile unsigned long *)0xE0100208)
  16. #define CLK_SRC3 (*(volatile unsigned long *)0xE010020c)
  17. #define CLK_SRC4 (*(volatile unsigned long *)0xE0100210)
  18. #define CLK_SRC5 (*(volatile unsigned long *)0xE0100214)
  19. #define CLK_SRC6 (*(volatile unsigned long *)0xE0100218)
  20. #define CLK_SRC_MASK0 (*(volatile unsigned long *)0xE0100280)
  21. #define CLK_SRC_MASK1 (*(volatile unsigned long *)0xE0100284)
  22. #define CLK_DIV0 (*(volatile unsigned long *)0xE0100300)
  23. #define CLK_DIV1 (*(volatile unsigned long *)0xE0100304)
  24. #define CLK_DIV2 (*(volatile unsigned long *)0xE0100308)
  25. #define CLK_DIV3 (*(volatile unsigned long *)0xE010030c)
  26. #define CLK_DIV4 (*(volatile unsigned long *)0xE0100310)
  27. #define CLK_DIV5 (*(volatile unsigned long *)0xE0100314)
  28. #define CLK_DIV6 (*(volatile unsigned long *)0xE0100318)
  29. #define CLK_DIV7 (*(volatile unsigned long *)0xE010031c)
  30. #define CLK_DIV0_MASK 0x7fffffff
  31. #define APLL_MDIV 0x7d
  32. #define APLL_PDIV 0x3
  33. #define APLL_SDIV 0x1
  34. #define MPLL_MDIV 0x29b
  35. #define MPLL_PDIV 0xc
  36. #define MPLL_SDIV 0x1
  37. #define set_pll(mdiv, pdiv, sdiv) (1<<31 | mdiv<<16 | pdiv<<8 | sdiv)
  38. #define APLL_VAL set_pll(APLL_MDIV,APLL_PDIV,APLL_SDIV)
  39. #define MPLL_VAL set_pll(MPLL_MDIV,MPLL_PDIV,MPLL_SDIV)
  40. //#define PLL_OFF
  41. // UART

  42. #define ULCON3 (*(volatile unsigned long *)0xE2900C00)
  43. #define UCON3 (*(volatile unsigned long *)0xE2900C04)
  44. #define UFCON3 (*(volatile unsigned long *)0xE2900C08)
  45. #define UMCON3 (*(volatile unsigned long *)0xE2900C0C)
  46. #define UFSTAT3 (*(volatile unsigned long *)0xE2900C18)
  47. #define UBRDIV3 (*(volatile unsigned long *)0xE2900C28)
  48. #define UDIVSLOT3 (*(volatile unsigned long *)0xE2900C2C)
  49. #define UTXH3 (*(volatile unsigned long *)0xE2900C20)
  50. #define URXH3 (*(volatile unsigned long *)0xE2900C24)
  51. #define UTRSTAT3 (*(volatile unsigned long *)0xE2900C10)

  52. void clock_init(void)
  53. {
  54. CLK_SRC0 = 0x0;// close PLL
  55. APLL_LOCK= 0x0000FFFF;
  56. MPLL_LOCK = 0x0000FFFF;
  57. APLL_CON0 =APLL_VAL; //FOUT= MDIV * FIN / (PDIV*2^(SDIV-1)) = 0x7d*24/(0x3*2^(1-1))=1000 MHz
  58. MPLL_CON = MPLL_VAL;// FOUT = MDIV*FIN/(PDIV*2^SDIV)=0x29b*24/(0xc*2^1)= 667 MHz
  59. CLK_SRC0= 0x10001111;// FOUT = MDIV*FIN/(PDIV*2^SDIV)=0x29b*24/(0xc*2^1)= 667 MHz
  60. }

  61. void uart_init()
  62. {
  63. GPA0CON= 0x22222222;
  64. GPA1CON= 0x2222;//配置引脚为RX/TX功能
  65. UFCON3= 0x1;//使能FIFO
  66. UMCON3= 0x0;//无流控
  67. ULCON3= 0x3;//数据位8,无校验,停止位1
  68. UCON3= 0x5; //时钟为PCLK,禁止中断,使能UART收 发
  69. UBRDIV3= 35;//设置波特率
  70. UDIVSLOT3= 0x1;
  71. }

  72. static void Delay(long count)
  73. {
  74. volatile int i, j = 0;
  75. volatile static int loop = 800000000/10000;
  76. for(;count > 0;count--)
  77. for(i=0;i < loop; i++) { j++; }
  78. }
  79. void main(void)
  80. {
  81. GPD0CON &=~(0xF << 0);
  82. GPH2CON = 0x00000000;
  83. clock_init();
  84. uart_init();
  85. while(1)
  86. {
  87. while (!(UFSTAT3 & 0xFF)==0)
  88. {
  89. UTXH3= URXH3;
  90. }
  91. }
  92. }
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1个回复

825843374 发表于 2015-9-29 13:40:24
学习了,感谢楼主
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