求教啊，DSP28335怎么实现错误联防的功能？PWM正常输出，当TZ1低电平时强制PWM输出低

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问答对人有帮助，内容完整，我也想知道答案0 #include "DSP2833x_Device.h" // DSP2833xHeaderfile Include File #include "DSP2833x_Examples.h" // DSP2833xExamples Include File // Prototypestatements for functions found within this file. interrupt void EPWM1_TZINT_ISR( void ); void InitEPwm1Example(); void main( void ) { InitSysCtrl(); InitEPwm1Gpio(); EALLOW; GpioCtrlRegs. GPAMUX1 . bit . GPIO12 =0x1; EDIS; DINT; InitPieCtrl(); // Disable CPUinterrupts and clear all CPU interrupt flags: IER = 0x0000; IFR = 0x0000; InitPieVectTable(); EALLOW; // This isneeded to write to EALLOW protected registers PieVectTable. EPWM1_TZINT = &EPWM1_TZINT_ISR; //EPWM1_TZINT_ISR; EDIS; // This isneeded to disable write to EALLOW protected registers InitEPwm1Example(); // InitEPwm2Example(); IER\|=M_INT2; PieCtrlRegs. PIEIER2 . bit . INTx1 =1; EINT; // EnableGlobal interrupt INTM ERTM; // EnableGlobal realtime interrupt DBGM // Step 6. IDLEloop. Just sit and loop forever (optional): for (;;) { __asm ( " NOP" ); } } void InitEPwm1Example() { EPwm1Regs. TBPRD = 937.5; // Set timer period EPwm1Regs. TBPHS . half . TBPHS = 0x0000; // Phase is 0 EPwm1Regs. TBCTR = 0x0000; // Clear counter EPwm1Regs. TBCTL . bit . CTRMODE = TB_COUNT_UPDOWN; // Count up EPwm1Regs. TBCTL . bit . PHSEN = TB_DISABLE; // Disable phase loading EPwm1Regs. TBCTL . bit . HSPCLKDIV = TB_DIV4; // Clock ratio to SYSCLKOUT EPwm1Regs. TBCTL . bit . CLKDIV = TB_DIV4; EPwm1Regs. TBCTL . bit . SYNCOSEL =0x01; EPwm1Regs. CMPCTL . bit . SHDWAMODE = CC_SHADOW; // Load registers every ZERO EPwm1Regs. CMPCTL . bit . SHDWBMODE = CC_SHADOW; EPwm1Regs. CMPCTL . bit . LOADAMODE = CC_CTR_ZERO; EPwm1Regs. CMPCTL . bit . LOADBMODE = CC_CTR_ZERO; // Set actions EPwm1Regs. AQCTLA . bit . ZRO = 0x2; //AQ_SET; // Set PWM1A on Zero EPwm1Regs. AQCTLA . bit . PRD = 0x1; //AQ_CLEAR; // Active Low PWMs - Setup Deadband EPwm1Regs. DBCTL . bit . OUT_MODE = 0x3; //DB_FULL_ENABLE; EPwm1Regs. DBCTL . bit . POLSEL = 0x2; //DB_ACTV_LO; EPwm1Regs. DBCTL . bit . IN_MODE = 0x0; //DBA_ALL; EPwm1Regs. DBRED = 30; //EPWM1_MIN_DB; EPwm1Regs. DBFED = 30; //EPWM1_MIN_DB; // EPwm1_DB_Direction = DB_UP; EPwm1Regs. TZSEL . bit . OSHT1 =1; EPwm1Regs. TZEINT . bit . OST =1; // Interrupt where we will change the Deadband EPwm1Regs. ETSEL . bit . INTSEL = ET_CTR_ZERO; // Select INT on Zero event EPwm1Regs. ETSEL . bit . INTEN = 1; // Enable INT EPwm1Regs. ETPS . bit . INTPRD = ET_3RD; // Generate INT on 3rd event } // Interruptroutines uses in this example: interrupt void EPWM1_TZINT_ISR( void ) { EPwm1Regs. TZCTL . bit . TZA =0x2; EPwm1Regs. TZCTL . bit . TZB =0x2; EPwm1Regs. ETCLR . bit . INT =1; PieCtrlRegs. PIEACK . all =PIEACK_GROUP2; EPwm1Regs. AQSFRC . all =0xc0; EPwm1Regs. AQCSFRC . bit . CSFA =0x1; EPwm1Regs. AQCSFRC . bit . CSFB =0x1; asm ( " ESTOP0" ); for (;;); } 1 已退回1积分
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