RZ/G2L串口SCI的使用（上）-德赢Vwin官网网

egrep -rin "CONFIG_SERIAL_SH_SCI" .out/.config 2180:CONFIG_SERIAL_SH_SCI=y 2181:CONFIG_SERIAL_SH_SCI_NR_UARTS=18 2182:CONFIG_SERIAL_SH_SCI_CONSOLE=y 2183:CONFIG_SERIAL_SH_SCI_EARLYCON=y 2184:CONFIG_SERIAL_SH_SCI_DMA=y

scif0: serial@1004b800 { compatible = "renesas,scif-r9a07g044"; reg = <0 0x1004b800 0 0x400>; interrupts = , , , , , ; interrupt-names = "eri", "rxi", "txi", "bri", "dri", "tei"; clocks = <&cpg CPG_MOD R9A07G044_SCIF0_CLK_PCK>; clock-names = "fck"; dmas = <&dmac 0x4e79>, <&dmac 0x4e7a>; dma-names = "tx", "rx"; power-domains = <&cpg>; resets = <&cpg R9A07G044_SCIF0_RST_SYSTEM_N>; status = "disabled"; }; scif1: serial@1004bc00 { compatible = "renesas,scif-r9a07g044"; reg = <0 0x1004bc00 0 0x400>; interrupts = , , , , , ; interrupt-names = "eri", "rxi", "txi", "bri", "dri", "tei"; clocks = <&cpg CPG_MOD R9A07G044_SCIF1_CLK_PCK>; clock-names = "fck"; dmas = <&dmac 0x4e7d>, <&dmac 0x4e7e>; dma-names = "tx", "rx"; power-domains = <&cpg>; resets = <&cpg R9A07G044_SCIF1_RST_SYSTEM_N>; status = "disabled"; }; scif2: serial@1004c000 { compatible = "renesas,scif-r9a07g044"; reg = <0 0x1004c000 0 0x400>; interrupts = , , , , , ; interrupt-names = "eri", "rxi", "txi", "bri", "dri", "tei"; clocks = <&cpg CPG_MOD R9A07G044_SCIF2_CLK_PCK>; clock-names = "fck"; dmas = <&dmac 0x4e81>, <&dmac 0x4e82>; dma-names = "tx", "rx"; power-domains = <&cpg>; resets = <&cpg R9A07G044_SCIF2_RST_SYSTEM_N>; status = "disabled"; }; scif3: serial@1004c400 { compatible = "renesas,scif-r9a07g044"; reg = <0 0x1004c400 0 0x400>; interrupts = , , , , , ; interrupt-names = "eri", "rxi", "txi", "bri", "dri", "tei"; clocks = <&cpg CPG_MOD R9A07G044_SCIF3_CLK_PCK>; clock-names = "fck"; dmas = <&dmac 0x4e85>, <&dmac 0x4e86>; dma-names = "tx", "rx"; power-domains = <&cpg>; resets = <&cpg R9A07G044_SCIF3_RST_SYSTEM_N>; status = "disabled"; }; scif4: serial@1004c800 { compatible = "renesas,scif-r9a07g044"; reg = <0 0x1004c800 0 0x400>; interrupts = , , , , , ; interrupt-names = "eri", "rxi", "txi", "bri", "dri", "tei"; clocks = <&cpg CPG_MOD R9A07G044_SCIF4_CLK_PCK>; clock-names = "fck"; dmas = <&dmac 0x4e89>, <&dmac 0x4e8a>; dma-names = "tx", "rx"; power-domains = <&cpg>; resets = <&cpg R9A07G044_SCIF4_RST_SYSTEM_N>; status = "disabled"; }; sci0: serial@1004d000 { compatible = "renesas,r9a07g044-sci", "renesas,rz-sci"; reg = <0 0x1004d000 0 0x400>; interrupts = , , , ; interrupt-names = "eri", "rxi", "txi", "tei"; clocks = <&cpg CPG_MOD R9A07G044_SCI0_CLKP>; clock-names = "fck"; power-domains = <&cpg>; resets = <&cpg R9A07G044_SCI0_RST>; status = "disabled"; }; sci1: serial@1004d400 { compatible = "renesas,r9a07g044-sci", "renesas,rz-sci"; reg = <0 0x1004d400 0 0x400>; interrupts = , , , ; interrupt-names = "eri", "rxi", "txi", "tei"; clocks = <&cpg CPG_MOD R9A07G044_SCI1_CLKP>; clock-names = "fck"; power-domains = <&cpg>; resets = <&cpg R9A07G044_SCI1_RST>; status = "disabled"; };

&scif2 { pinctrl-0 = <&scif2_pins>; pinctrl-names = "default"; uart-has-rtscts; status = "okay"; };

export ARCH=arm64 export CROSS_COMPILE=aarch64-none-elf- export PATH=$PATH:/opt/arm/gcc-arm-10.2-2020.11-x86_64-aarch64-none-elf/bin make defconfig O=.out && make -j8 O=.out