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The TP3054, TP3057 family consists of m-law and A-law
monolithic PCM CODEC/filters utilizing the A/D and D/A
conversion architecture shown inFigure 1 , and a serial PCM
interface. The devices are fabricated using National's advanced
double-poly CMOS process (microCMOS).
The encode portion of each device consists of an input gain
adjust amplifier, an active RC pre-filter which eliminates very
high frequency noise prior to entering a switched-capacitor
band-pass filter that rejects signals below 200 Hz and above
3400 Hz. Also included are auto-zero circuitry and a companding
coder which samples the filtered signal and encodes
it in the companded m-law or A-law PCM format. The
decode portion of each device consists of an expanding
decoder, which reconstructs the analog signal from the
companded m-law or A-law code, a low-pass filter which
corrects for the sin x/x response of the decoder output and
rejects signals above 3400 Hz followed by a single-ended
power amplifier capable of driving low impedance loads.
The devices require two 1.536 MHz, 1.544 MHz or 2.048
MHz transmit and receive master clocks, which may be
asynchronous; transmit and receive bit clocks, which may
vary from 64 kHz to 2.048 MHz; and transmit and receive
frame sync pulses. The timing of the frame sync pulses and
PCM data is compatible with both industry standard formats.
Features
Y Complete CODEC and filtering system (COMBO)
including:
Ð Transmit high-pass and low-pass filtering
Ð Receive low-pass filter with sin x/x correction
Ð Active RC noise filters
Ð m-law or A-law compatible COder and DECoder
Ð Internal precision voltage reference
Ð Serial I/O interface
Ð Internal auto-zero circuitry
Y m-law, 16-pinÐTP3054
Y A-law, 16-pinÐTP3057
Y Designed for D3/D4 and CCITT applications
Y g5V operation
Y Low operating powerÐtypically 50 mW
Y Power-down standby modeÐtypically 3 mW
Y Automatic power-down
Y TTL or CMOS compatible digital interfaces
Y Maximizes line interface card circuit density
Y Dual-In-Line or surface mount packages
Y See also AN-370, ``Techniques for Designing with
CODEC/Filter COMBO Circuits''
monolithic PCM CODEC/filters utilizing the A/D and D/A
conversion architecture shown inFigure 1 , and a serial PCM
interface. The devices are fabricated using National's advanced
double-poly CMOS process (microCMOS).
The encode portion of each device consists of an input gain
adjust amplifier, an active RC pre-filter which eliminates very
high frequency noise prior to entering a switched-capacitor
band-pass filter that rejects signals below 200 Hz and above
3400 Hz. Also included are auto-zero circuitry and a companding
coder which samples the filtered signal and encodes
it in the companded m-law or A-law PCM format. The
decode portion of each device consists of an expanding
decoder, which reconstructs the analog signal from the
companded m-law or A-law code, a low-pass filter which
corrects for the sin x/x response of the decoder output and
rejects signals above 3400 Hz followed by a single-ended
power amplifier capable of driving low impedance loads.
The devices require two 1.536 MHz, 1.544 MHz or 2.048
MHz transmit and receive master clocks, which may be
asynchronous; transmit and receive bit clocks, which may
vary from 64 kHz to 2.048 MHz; and transmit and receive
frame sync pulses. The timing of the frame sync pulses and
PCM data is compatible with both industry standard formats.
Features
Y Complete CODEC and filtering system (COMBO)
including:
Ð Transmit high-pass and low-pass filtering
Ð Receive low-pass filter with sin x/x correction
Ð Active RC noise filters
Ð m-law or A-law compatible COder and DECoder
Ð Internal precision voltage reference
Ð Serial I/O interface
Ð Internal auto-zero circuitry
Y m-law, 16-pinÐTP3054
Y A-law, 16-pinÐTP3057
Y Designed for D3/D4 and CCITT applications
Y g5V operation
Y Low operating powerÐtypically 50 mW
Y Power-down standby modeÐtypically 3 mW
Y Automatic power-down
Y TTL or CMOS compatible digital interfaces
Y Maximizes line interface card circuit density
Y Dual-In-Line or surface mount packages
Y See also AN-370, ``Techniques for Designing with
CODEC/Filter COMBO Circuits''
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