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The TUSB1210 is a USB2.0 transceiver chip, designed to interface with a USB controller via a ULPI
interface. It supports all USB2.0 data rates (High-Speed 480Mbps, Full-Speed 12 Mbps and Low-Speed
1.5Mbps) in both Host and Peripheral modes. It additionally supports a UART mode and legacy ULPI
serial modes.
TUSB1210 also supports the OTG (Ver1.3) optional addendum to the USB 2.0 Specification, including
Host Negotiation Protocol (HNP) and Session Request Protocol (SRP).
TUSB1210 is optimized to be interfaced through a 12-pin SDR UTMI Low Pin Interface (ULPI), supporting
both input clock and output clock modes, with 1.8 V interface supply voltage.
TUSB1210 integrates a 3.3 V LDO, which makes it flexible to work with either battery operated systems or
pure 3.3 V supplied systems. Both the main supply and the 3.3 V power domain can be supplied through
an external switched-mode converter for optimized power efficiency.
TUSB1210 includes a POR circuit to detect supply presence on VBAT and VDDIO pins. TUSB1210 can be
disabled or configured in low power mode for energy saving.
TUSB1210 is protected against accidental shorts to 5 V or ground on its exposed interface (DP/DM/ID). It
is also protected against up to 20 V surges on VBUS.
TUSB1210 integrates a high-performance low-jitter 480 MHz PLL and supports two clock configurations.
Depending on the required link configuration, TUSB1210 supports both ULPI input and output clock mode
: input clock mode, in which case a square-wave 60 MHz clock is provided to TUSB1210 at the ULPI
interface CLOCK pin; and output clock mode in which case TUSB1210 can accept a square-wave
reference clock at REFCLK of either 19.2 MHz, 26 MHz. Frequency is indicated to TUSB1210 via the
configuration pin CFG. This can be useful if a reference clock is already available in the system.
interface. It supports all USB2.0 data rates (High-Speed 480Mbps, Full-Speed 12 Mbps and Low-Speed
1.5Mbps) in both Host and Peripheral modes. It additionally supports a UART mode and legacy ULPI
serial modes.
TUSB1210 also supports the OTG (Ver1.3) optional addendum to the USB 2.0 Specification, including
Host Negotiation Protocol (HNP) and Session Request Protocol (SRP).
TUSB1210 is optimized to be interfaced through a 12-pin SDR UTMI Low Pin Interface (ULPI), supporting
both input clock and output clock modes, with 1.8 V interface supply voltage.
TUSB1210 integrates a 3.3 V LDO, which makes it flexible to work with either battery operated systems or
pure 3.3 V supplied systems. Both the main supply and the 3.3 V power domain can be supplied through
an external switched-mode converter for optimized power efficiency.
TUSB1210 includes a POR circuit to detect supply presence on VBAT and VDDIO pins. TUSB1210 can be
disabled or configured in low power mode for energy saving.
TUSB1210 is protected against accidental shorts to 5 V or ground on its exposed interface (DP/DM/ID). It
is also protected against up to 20 V surges on VBUS.
TUSB1210 integrates a high-performance low-jitter 480 MHz PLL and supports two clock configurations.
Depending on the required link configuration, TUSB1210 supports both ULPI input and output clock mode
: input clock mode, in which case a square-wave 60 MHz clock is provided to TUSB1210 at the ULPI
interface CLOCK pin; and output clock mode in which case TUSB1210 can accept a square-wave
reference clock at REFCLK of either 19.2 MHz, 26 MHz. Frequency is indicated to TUSB1210 via the
configuration pin CFG. This can be useful if a reference clock is already available in the system.
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