德赢Vwin官网网>电子资料下载>模拟数字>99条模拟设计原则，电子工程师值得一看资料下载

99条模拟设计原则，电子工程师值得一看资料下载

2077293 2021-04-01 | pdf | 187.97KB | 次下载 | 2积分

资料介绍

vwin 设计的100条圣经 1、Capacitors and resistors have parasitic inductance, about 0.4nH for surface mount and 4nH for a leaded component. 电阻跟电容都有寄生电感，贴片封装的大概0.4nH，插件的大概4nH。 2、Capacitors and resistors have parasitic inductance, about 0.4nH for surface mount and 4nH for a leaded component. 如果你不想通过在高带宽晶体管三个引脚中的至少两个引脚放置损耗元件的方法消除振荡.铁氧体磁珠会起到很好的作用. 3、When taking DC measurements in a circuit and they don"t make sense, suspect that something is oscillating. 对一个电路采用直流测试并且不起作用时,应该怀疑有元件在振荡 4、Opamps will often oscillate when driving capacitive loads. 运放在驱动容性负载时经常会震荡。 5、The baseemitter voltage Vbe of a small signal transistor is about 0.65v and drops about 2mV/deg C. Vbe goes down with increasing temp. 小信号晶体管的基-射极电压Vbe大约是0.65伏特，大约以2毫伏/摄氏度的速度降低。Vbe随着温度的升高而降低。 6、Multiply 0.13nV by the square root of the ohmic value of a resistor to find the noise in a 1Hz bandwidth. Then multiply by the square root of the BW in Hz gives the total noise voltage. 电阻阻值的平方根，乘以0.13纳伏，可以得到1赫兹带宽的噪声。再乘以以赫兹为单位的带宽的平方根，可以得到总噪声电压。 7、Johnson noise current goes down with a increase in resistance. Johnson噪声电流随着电阻的增加而降低. 8、The impedance looking into the emitter of a transistor at room temp is 26Ohm/Ie in mA 室温下晶体管射极阻抗为26欧姆/mA 9、All amplifiers are differential in that they are referenced to ground somewhere. 所有的放大器都是相对于某个地电平的差分放大。 10、Typical metal film resistor has a temp coef of about 100 ppm/deg C （典型的金属薄膜电阻具备100 ppm/deg C的温度系数） 11、The input noise voltage of a quiet op amp is 1nv/sqrt(Hz) but there are plenty available with 20nV/sqrt(Hz). Op amps with bipolar front-ends have lower voltage noise and higher current noise than those with FET front-ends （低噪音运放的输入噪声电压可以达到1nv/sqrt(Hz) ，但是我们大量用到的运放具有20nV/sqrt(Hz)的输入噪音。双极晶体管结构比FET结构的运算放大器具备更地的电压噪声和更高的电流噪声） 12、Using an LC circuit as a power supply filter can actually multiply the power supply noise at the filter"s resonant frequency. Use inductor with low Q to overcome this. （用LC滤波器对电源滤波将会增加电源在滤波器谐振频率点上的噪声，通过选择低Q的电感可以有效克服这一点。） 13、Use comparators for comparing and op amps for amplifying and don"t even think of mixing the two. （用比较器进行比较，用运放进行放大，千万不要搞混。） 14、Ceramic caps with any other dielectric other than NPO should only be used for bypass applications. （除高频瓷片电容外的瓷片电容仅可用作旁路电容） 15、An N-channel enhancement-mode FET needs +ve voltage on the gate-source to conduct form drain-source. n沟道增强型mosfet需要在gate-source 间接入正电压来控制drain-source间的电流Ids 16、Small signal JFETS work very well as low-leakage diodes by connecting drain & source together in log current-to-voltage converters and low leakage input protection. Small signal bipolars with b-c tied together will also make nice low-leakage diodes. JFETS短接源漏极在小信号电流-电压转换和输入保护方面具备和低泄漏二极管媲美的特性，小信号测量中晶体管B-E极短接也相当于一个优异的低泄漏二极管。 17、With low pass filter use Bessel for least amount of overshoot in the time domain, and Cauer (or elliptic) for fastest rolloff in the freq domain. 设计低通滤波器时选用贝塞尔型可以使时域较平坦，没有太多过冲，选用切比雪夫可以提高截止频率的陡峭性。 18、dB is always 10 times the log of the ratio of 2 powers. 分贝是10*lg的比值。 19、At low frequencies, the current in the collector of a transistor is in phase with the applied current at the base. At high frequencies the current at the collector lags by 90deg. You must appreciate this simple fact to understand high frequency oscillators. 低频情况下，晶体管集电极电流与基极电流同相，但在高频情况下，集电极电流相位上滞后90度，这有助于你理解高频振荡。 20、The most common glass-epoxy PCB material (FR4) has a dielectric constant of about 4.3 To make a trace with a characteristic impedance of 100 Ohm, use a trace thickness of about 0.4 times the thickness of the board with a ground plane on the opposite side. For a 50Ohm trace make it 2 times the thickness. PCB应用最普通的FR4材料的介质常数大约为4.3，印制版线为得到100欧的特征阻抗需要的线宽为PCB板（背面覆铜）厚度的0.4倍，50欧的阻抗需要线宽为板后的2倍。--线长呢？不解 21、If you need a programmable dynamic current source, find out about operational transconductance amps. Most of the problem is figuring out when you need a programmable dynamic current source. 当你用跨导运算放大器作为可编程动态电流源时你会发现很多问题。 22、A CMOS output with an emitter follower can drive a 5V relay nicely as the relays normally have a must-make spec of 3.5V. This saves power and require no flyback components. CMOS输出配合一个射极跟随器可以很好的驱动一个5V工作的继电器（必须是3.5V以上才能正常工作），这样节省了功率并不需要反馈元件。 23、Typical thermocouple potential is 30uV/degC. Route signals differentially, along the same path, avoid temp gradients. DPDT latching relays won"t heat up when multiplexing these signals. 典型的热电偶电位是 30uV/degC，布线是差分信号要尽量走同样的路径避免差分线上产生温度梯度。当需要切换这些信号时，双刀双掷常闭继电器可以避免切换过程中产生的热量，影响热电偶温度测量的精度。 24、You SHOULD be bothered by a design that looks messy, cluttered or indirect. This uncomfortable feeling is one of the few indications that there"s a better way. 你可能会直接或间接的感到设计的电路感混乱不堪，这种不好的感觉其实是一种很宝贵的暗示，那就是那肯定还有一直能够更好的设计路径