cy7c136e/cy7c136ae 1k / 2K×8双端口RAM数据手册

　　CY7C131E/CY7C131AE/CY7C136E/CY7C136AE are high-speed， low-power CMOS 1K/2K × 8 dual-port staticRAMs. Two ports are provided permitting independentaccess to any location in memory. The CY7C131E/CY7C131AE/CY7C136E/ CY7C136AEcanbe used as a standalone dual-port static RAM. It is the solution to applications requiring shared or buffered data， such as cache memory forDSP， bit-slice， or multiprocessor designs. Each port has independent controlpins; chip enable （CE）， writeenable （R/W）， and output enable （OE）。 Two flags are provided on each port， BUSY and INT. The BUSY flag signals that the port is trying to access the same location， which is currently being accessed by the other port. The INT is an interrupt flag indicating that data is placed in a unique location［1］。 The BUSY and INT flags are push pull outputs. An automatic power-down feature is controlledindependently on each port by the chip enable （CE） pins. The CY7C131E/CY7C131AE/CY7C136E/CY7C136AE are available in 52-pin Pb-freePLCC and 52-pin Pb-free PQFP. For a complete list of related documentation， click here.