德赢Vwin官网网>电子资料下载>电源技术>ADM1060通信系统监控/时序电路数据表

ADM1060通信系统监控/时序电路数据表

2453872 2017-10-25 | rar | 0.46 MB | 次下载 | 免费

资料介绍

　　The ADM1060 is a programmable supervisory/sequencing device that offers a single chip solution for multiple power supply fault detection and sequencing in communications systems.

　　In central offices， servers， and other infrastructure systems， a common backplane dc supply is reduced to multiple board sup-plies using dc-to-dc converters. These multiple supplies are used to power different sections of the board， such as 3.3 V logic circuits， 5 V logic circuits， DSP core， and DSP I/O circuits. There is usually a requirement that certain sections power up before others; for example， a DSP core may need to power up before the DSP I/O， or vice versa， to avoid damage， miscommunication， or latch-up. The ADM1060 facilitates this， providing supply

　　fault detection and sequencing/combinatorial logic for up to seven independent supplies. The seven supply fault detectors consist of one high voltage detector （up to +14.4 V）， two bipolar voltage detectors （up to +6 V or down to −6 V）， and four posi-tive low voltage detectors （up to +6 V）。 All of the detectors can be programmed to detect undervoltage， overvoltage， or out-of-window （undervoltage or overvoltage） conditions. The inputs to these supply fault detectors are via the VH （high voltage） pin， VBn （positive or negative） pins， and VPn （positive only） pins. Either the VH supply or one of the VPn supplies is used to power the ADM1060 （whichever is highest）。 This ensures that in the event of a supply failure， the ADM1060 is kept alive for as long as possible， thus enabling a reliable fault flag to be asserted and the system to be powered down in an ordered fashion.

　　Other inputs to the ADM1060 include a watchdog detector （WDI） and four general-purpose inputs （GPIn）。 The watchdog detector can be used to monitor a processor clock. If the clock does not toggle （transition from low to high or from high to low） within a programmable timeout period （up to 18 sec.）， a fail flag will assert. The four general-purpose inputs can be con-figured as logic buffers or to detect positive/negative edges and to generate a logic pulse or level from those edges. Thus， the user can input control signals from other parts of the system （e.g.， RESET or POWER_GOOD） to gate the sequencing of the supplies supervised by the ADM1060.

　　The ADM1060 features nine programmable driver outputs （PDOs）。 All nine outputs can be configured to be logic outputs， which can provide multiple functions for the end user such as RESET generation， POWER_GOOD status， enabling of LDOs， and watchdog timeout assertion. PDOs 1 to 4 have the added feature of being able to provide an internally charge-pumped high voltage for use as the gate drive of an external N-channel FET that could be placed in the path of one of the supplies being supervised.
ADM1060通信系统监控/时序电路数据表