MPC860P PowerQUICC微处理器特性及功能简介

The MPC860 Plus (MPC860P) is apin-compatible enhanced version of the MPC860
PowerQUICC™ microprocessorthat increases the instruction cache size from 4 to 16
Kbytes and the data cache from 4 to 8 Kbytes. Dual-portRAMis increased from 5 to 8
Kbytes, extending the flexibility and capabilities of the communications processor module (CPM). The MPC860P is also capable of system clock rates of 80 MHz and faster.
The MPC860P is a versatile, one-chip integrated microprocessor and peripheral
combination thatcanbe used in a variety of controller applications, excelling particularly in communications and networking products. The MPC860P has two processing blocks, the embedded PowerPC core and the CPM. The CPM supports four serial communications controllers(SCCs); however, there areactually eight serial channels—four SCCs, two serial management controllers (SMCs), one serial peripheral interface (SPI) and oneI2Cinterface. This dual-processor architecture provides lower power consumption than traditional architectures because the CPM off-loads peripheral tasks from the core.
As a superset of the MPC860SR and the MPC860T (revision D), the MPC860P supports
ATM features including the UTOPIA interface, 10/100 base-T (Fast)Ethernet, and QMC
microcode for multichannel HDLC support.